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PDF TISP5070H3BJ Data sheet ( Hoja de datos )
| Número de pieza | TISP5070H3BJ | |
| Descripción | FORWARD-CONDUCTING UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS | |
| Fabricantes | Power Innovations Limited | |
| Logotipo |  |
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TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
Copyright © 1999, Power Innovations Limited, UK
JANUARY 1998 - REVISED MARCH 1999
TELECOMMUNICATION SYSTEM HIGH CURRENT OVERVOLTAGE PROTECTORS
q Analogue Line Card and ISDN Protection
- Analogue SLIC
- ISDN U Interface
- ISDN Power Supply
q 8 kV 10/700, 200 A 5/310 ITU-T K20/21 rating
SMBJ PACKAGE
(TOP VIEW)
12
q Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
DEVICE
‘5070
‘5080
‘5110
‘5150
VDRM
V(BO)
MINIMUM
V
-58
-65
-80
-120
MAXIMUM
V
-70
-80
-110
-150
q Rated for International Surge Wave Shapes
device symbol
MDXXBGB
2
SD5XAB
1
WAVE SHAPE
STANDARD
2/10 µs
8/20 µs
10/160 µs
10/700 µs
10/560 µs
10/1000 µs
GR-1089-CORE
ANSI C62.41
FCC Part 68
ITU-T K20/21
FCC Part 68
GR-1089-CORE
ITSP
A
500
300
250
200
160
100
description
These devices are designed to limit overvoltages on the telephone and data lines. Overvoltages are normally
caused by a.c. power system or lightning flash disturbances which are induced or conducted on to the
telephone line. A single device provides 2-point protection and is typically used for the protection of ISDN
power supply feeds. Two devices, one for the Ring output and the other for the Tip output, will provide
protection for single supply analogue SLICs. A combination of three devices will give a low capacitance
protector network for the 3-point protection of ISDN lines.
The protector consists of a voltage-triggered unidirectional thyristor with an anti-parallel diode. Negative
overvoltages are initially clipped by breakdown clamping until the voltage rises to the breakover level, which
causes the device to crowbar into a low-voltage on state. This low-voltage on state causes the current
resulting from the overvoltage to be safely diverted through the device. The high crowbar holding current
prevents d.c. latchup as the diverted current subsides. Positive overvoltages are limited by the conduction of
the anti-parallel diode.
This TISP5xxxH3BJ range consists of four voltage variants to meet various maximum system voltage levels
(58 V to 120 V). They are guaranteed to voltage limit and withstand the listed international lightning surges in
both polarities. These high (H) current protection devices are in a plastic package SMBJ (JEDEC DO-214AA
with J-bend leads) and supplied in embossed carrier reel pack.
PRODUCT INFORMATION
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
1 page  
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
JANUARY 1998 - REVISED MARCH 1999
TYPICAL CHARACTERISTICS
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
TC5XAFA
100
NORMALISED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE TC5XAIA
1.10
10
1.05
1
0·1
VD = -50 V
0·01
0·001
-25
0 25 50 75 100 125
TJ - Junction Temperature - °C
Figure 2.
150
ON-STATE AND FORWARD CURRENTS
vs
ON-STATE AND FORWARD VOLTAGES
200
150 TA = 25 °C
100 tW = 100 µs
70
50
40
30
20
15
10
7
5 VF
4
3
VT
2
1.5
1
0.7 1
1.5 2
3 4 5 7 10
TC5LAC VT , VF- On-State Voltage, Forward Voltage - V
Figure 4.
1.00
0.95
-25
0 25 50 75 100 125
TJ - Junction Temperature - °C
Figure 3.
150
NORMALISED HOLDING CURRENT
vs
JUNCTION TEMPERATURE TC5XAD
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
-25
0 25 50 75 100 125
TJ - Junction Temperature - °C
Figure 5.
150
PRODUCT INFORMATION
5
5 Page 
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
JANUARY 1998 - REVISED MARCH 1999
to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one ampere. In
some cases it may be necessary to add some extra series resistance to prevent the fuse opening during
impulse testing. The current versus time characteristic of the overcurrent protector must be below the line
shown in Figure 8. In some cases there may be a further time limit imposed by the test standard (e.g. UL
1459 wiring simulator failure).
capacitance
The protector characteristic off-state capacitance values are given for d.c. bias voltage, VD, values of -1 V,
-2 V and -50 V. The TISP5150H3BJ is also given for a bias of -100 V. Values for other voltages may be
determined from Figure 6. Up to 10 MHz the capacitance is essentially independent of frequency. Above
10 MHz the effective capacitance is strongly dependent on connection inductance. In Figure 12, the typical
conductor bias voltages will be about -2 V and -50 V. Figure 7 shows the differential (line unbalance)
capacitance caused by biasing one protector at -2 V and the other at -50 V. For example, the TISP5070H3BJ
has a differential capacitance value of 166 pF under these conditions.
normal system voltage levels
The protector should not clip or limit the voltages that occur in normal system operation. Figure 9 allows the
calculation of the protector VDRM value at temperatures below 25 °C. The calculated value should not be less
than the maximum normal system voltages. The TISP5150H3BJ, with a VDRM of -120 V, can be used to
protect ISDN feed voltages having maximum values of -99 V, -110 V and -115 V (range 3 through to range 5).
These three range voltages represent 0.83 (99/120), 0.92 (110/120) and 0.96 (115/120) of the -120 V
TISP5150H3BJ VDRM. Figure 9 shows that the VDRM will have decreased to 0.944 of its 25 °C value at
-40 °C. Thus the supply feed voltages of -99 V (0.83) and -110 V (0.92) will not be clipped at temperatures
down to -40 °C. The -115 V (0.96) feed supply may be clipped if the ambient temperature falls below -21 °C.
JESD51 thermal measurement method
To standardise thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51
standard. Part 2 of the standard (JESD51-2, 1995) describes the test environment. This is a 0.0283 m3 (1 ft3)
cube which contains the test PCB (Printed Circuit Board) horizontally mounted at the centre. Part 3 of the
standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for packages smaller
than 27 mm on a side and the other for packages up to 48 mm. The SMBJ measurements used the smaller
76.2 mm x 114.3 mm (3.0 “ x 4.5 “) PCB. The JESD51-3 PCBs are designed to have low effective thermal
conductivity (high thermal resistance) and represent a worse case condition. The PCBs used in the majority
of applications will achieve lower values of thermal resistance and so can dissipate higher power levels than
indicated by the JESD51 values.
PRODUCT INFORMATION
11
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