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Número de pieza | TIP35B | |
Descripción | Complementary Silicon High-Power Transistors | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de TIP35B (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
No Preview Available ! TIP35A, TIP35B, TIP35C
(NPN); TIP36A, TIP36B,
TIP36C (PNP)
Complementary Silicon
High-Power Transistors
Designed for general−purpose power amplifier and switching
applications.
Features
• 25 A Collector Current
• Low Leakage Current −
ICEO = 1.0 mA @ 30 and 60 V
• Excellent DC Gain −
hFE = 40 Typ @ 15 A
• High Current Gain Bandwidth Product −
⎪hfe⎪ = 3.0 min @ IC
= 1.0 A, f = 1.0 MHz
• These are Pb−Free Devices*
MAXIMUM RATINGS
Rating
TIP35A TIP35B TIP35C
Symbol TIP36A TIP36B TIP36C Unit
Collector − Emitter Voltage
Collector − Base Voltage
Emitter − Base Voltage
Collector Current
− Continuous
− Peak (Note 1)
VCEO
VCB
VEB
IC
60
60
80 100 Vdc
80 100 Vdc
5.0 Vdc
Adc
25
40
Base Current − Continuous
Total Power Dissipation
@ TC = 25_C
Derate above 25_C
Operating and Storage
Junction Temperature Range
IB
PD
TJ, Tstg
5.0
125
−65 to +150
Adc
W
W/_C
_C
Unclamped Inductive Load
ESB
THERMAL CHARACTERISTICS
90
mJ
Characteristic
Symbol
Max
Unit
Thermal Resistance,
Junction−to−Case
RqJC
1.0 °C/W
Junction−To−Free−Air
Thermal Resistance
RqJA
35.7 °C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Pulse Test: Pulse Width = 10 ms, Duty Cycle v 10%.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2012
May, 2012 − Rev. 6
1
http://onsemi.com
25 AMPERE
COMPLEMENTARY SILICON
POWER TRANSISTORS
60−100 VOLTS, 125 WATTS
SOT−93 (TO−218)
CASE 340D
STYLE 1
TO−247
CASE 340L
STYLE 3
NOTE: Effective June 2012 this device will
be available only in the TO−247
package. Reference FPCN# 16827.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
TIP35/D
1 page TIP35A, TIP35B, TIP35C (NPN); TIP36A, TIP36B, TIP36C (PNP)
10
7.0 (PNP)
5.0 (NPN)
TJ = 25°C
VCC = 30 V
3.0
2.0
ts
IC/IB = 10
IB1 = IB2
1.0 ts
0.7
0.5 tf
0.3
0.2 tf
0.1
0.3 0.5 0.7 1.0
2.0 3.0 5.0 7.0 10
IC, COLLECTOR CURRENT (AMPERES)
Figure 4. Turn−Off Time
20 30
1000
500
200
100
50
20
10
5.0
2.0
1.0
0.1
0.2
VCE = 4.0 V
TJ = 25°C
PNP
NPN
0.5 1.0 2.0 5.0 10 20
IC, COLLECTOR CURRENT (AMPS)
Figure 5. DC Current Gain
50 100
FORWARD BIAS
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 6 is based on TC = 25_C; TJ(pk) is
variable depending on power level. Second breakdown
pulse limits are valid for duty cycles to 10% but must be
derated when TC w 25_C. Second breakdown limitations do
not derate the same as thermal limitations.
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn−off, in most cases,
with the base to emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping, RC
snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Bias Safe Operating Area
and represents the voltage−current conditions during
reverse biased turn−off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 7 gives RBSOA characteristics.
100
50
30
20
10
5.0
2.0
1.0
0.5
0.3
0.2
0
1.0
300 ms
TC = 25°C
1.0 ms
10 ms
dc
SECONDARY BREAKDOWN
THERMAL LIMIT
BONDING WIRE LIMIT
TIP35A, 36A
TIP35B, 36B
TIP35C, 36C
2.0 3.0 5.0 7.0 10
20 30 50 70 100
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 6. Maximum Rated Forward Bias
Safe Operating Area
40
30 TJ ≤ 100°C
25
20
TIP35C
15 TIP36C
TIP35B
10 TIP36B
TIP35A
5.0 TIP36A
0
0 10 20 30 40 50 60 70 80 90 100
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 7. Maximum Rated Forward Bias
Safe Operating Area
http://onsemi.com
5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet TIP35B.PDF ] |
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