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PDF USBUF01P6 Data sheet ( Hoja de datos )
| Número de pieza | USBUF01P6 | |
| Descripción | EMI FILTER AND LINE TERMINATION FOR USB UPSTREAM PORTS | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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®
IPAD™
USBUF01P6
EMI FILTER AND LINE TERMINATION
FOR USB UPSTREAM PORTS
APPLICATIONS
EMI Filter and line termination for USB upstream
ports on:
■ USB Hubs
■ PC peripherals
FEATURES
■ Monolithic device with recommended line
termination for USB upstream ports
■ Integrated Rt series termination and Ct
bypassing capacitors.
■ Integrated ESD protection
■ Small package size
DESCRIPTION
The USB specification requires upstream ports to
be terminated with pull-up resistors from the D+
and D- lines to Vbus. On the implementation of
USB systems, the radiated and conducted EMI
should be kept within the required levels as stated
by the FCC regulations. In addition to the
requirements of termination and EMC
compatibility, the computing devices are required
to be tested for ESD susceptibility.
The USBUF01P6 provides the recommended line
termination while implementing a low pass filter to
limit EMI levels and providing ESD protection
which exceeds IEC61000-4-2 level 4 standard.
The device is packaged in a SOT-666 which is the
smallest available lead frame package (45%
smaller than the standard SOT323).
BENEFITS
■ EMI / RFI noise suppression
■ Required line termination for USB upstream
ports
■ ESD protection exceeding IEC61000-4-2 level 4
■ High flexibility in the design of high density
boards
■ Tailored to meet USB 2.0 standard (low speed
and high speed data transmission)
SOT-666IP
(Internal Pad)
FUNCTIONAL DIAGRAM
3.3 V
Rt Rp
D1 D4
Ct
Grd 3.3 V
Rt
D2
Ct
D3
COMPLIES WITH THE FOLLOWING STANDARDS:
■ IEC61000-4-2 level4:
15kV (air discharge)
8kV (contact discharge)
■ MIL STD 883E-Method 3015-7:
Class 3 C = 100 pF R = 1500 Ω
3 positive strikes and 3 negative strikes (F = 1 Hz)
Order Codes
Part Number
USBUF01P6
Marking
U
May 2004
REV. 2
1/7
1 page  
Fig. A5: USBUF01P6 ESD clamping behavior.
Rg S1
Rt
S2
Rd Vinput
Rd
VPP
VBR
Voutput
VBR
ESD Surge
USBUF01P6
Fig. A6: Measurement board.
ESD
SURGE
15kV
Air
Discharge
TEST BOARD
Vin Vout
USBUF01P6
Rload
Device
to be
protected
To have a good approximation of the remaining voltages at both Vin and Vout stages, we give the typical
dynamical resistance value Rd. By taking into account these following hypothesis : Rt>Rd, Rg>Rd and
Rload>Rd, it gives these formulas:
Vinput = R-----g----⋅---V-----B---R-----+-----R----d----⋅---V-----g-
Rg
Voutput = -R----t---⋅---V----B----R-----+----R-----d----⋅---V----i--n----p---u----t
Rt
The results of the calculation done for Vg=8kV, Rg=330Ω (IEC61000-4-2 standard), VBR=7V (typ.) and
Rd = 2Ω (typ.) give:
Vinput = 55.48 V
Voutput = 10.36 V
This confirms the very low remaining voltage across the device to be protected. It is also important to note
that in this approximation the parasitic inductance effect was not taken into account. This could be few
tenths of volts during few ns at the Vinput side. This parasitic effect is not present at the Voutput side due
the low current involved after the resistance Rt.
The measurements done hereafter show very clearly (fig. A7) the high efficiency of the ESD protection :
- no influence of the parasitic inductances on Voutput stage
- Voutput clamping voltage very close to VBR (breakdown voltage) in the positive way and -VF (forward
voltage) in the negative way
5/7
®
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| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet USBUF01P6.PDF ] | |
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