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PDF US3005 Data sheet ( Hoja de datos )

Número de pieza US3005
Descripción 5 BIT PROGRAMMABLE SYNCHRONOUS BUCK CONTROLLER IC WITH DUAL LDO CONTROLLER
Fabricantes UNISEM 
Logotipo UNISEM Logotipo



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US3004/US3005
5 BIT PROGRAMMABLE SYNCHRONOUS BUCK
CONTROLLER IC WITH DUAL LDO CONTROLLER
FEATURES
Meets Latest VRM 8.4 Specification for PIII
Provides Single Chip Solution for Vcore, GTL+
and Clock Supply
On board DAC programs the output voltage
from 1.3V to 3.5V. The US3004/5 remains on for
VID code of (11111).
Dual linear regulator controller on board for
1.5V GTL+ and 2.5V clock supplies
Loss less Short Circuit Protection
Synchronous operation allows maximum effi-
ciency
Patented architecture allows fixed frequency
operation as well as 100% duty cycle during
dynamic load
Min part count, No external Compensation
Soft Start
High current totem pole driver for direct driv-
ing of the external Power MOSFET
Power Good function
APPLICATIONS
Pentium III & next generation processor DC to DC
converter application
Low cost Pentium with AGP
DESCRIPTION
The US3004/5 series of controller ICs are specifically
designed to meet Intel specification for Pentium III
microprocessor applications as well as the next genera-
tion P6 family processors. The IC provides a single
chip controller IC for the Vcore , GTL+ and clock
supplies required for the Pentium III applications.
These devices feature a patented topology that in
combination with a few external components as shown
in the typical application circuit ,will provide in excess of
20A of output current for an on- board DC/DC converter
while automatically providing the right output voltage via
the 5 bit internal DAC meeting the latest VRM specifica-
tion .These products also feature, loss less current sens-
ing by using the Rds-on of the high side Power
MOSFET as the sensing resistor, a Power Good win-
dow comparator that switches its open collector output
low when the output is outside of a ±10% window. Other
features of the device are ; Undervoltage lockout for both
5V and 12V supplies, an external programmable soft
start function as well as programming the oscillator fre-
quency by using an external capacitor.
TYPICAL APPLICATION
5V
C13
L1
C5
C3
Q1
R1
R2
L2
C7
Q2 R4
R12
R3
R13
Vout 3
C10
3.3V
12V
C1
C2
VID4
VID3
VID2
VID1
VID0
C4
12
V12
1 Ct
13 SS
D4
15
C6 R10
5 8 9 7 11 10 14
V5 CS+ HDrv CS- LDrv Gnd Vfb3
Lin1 2
US3004
Vfb1 3
D3 D2 D1 D0 PGd Vfb2 Lin2
16 17 18 19
6
4 20 C9
Q3
R11
C15
Q4
3.3V
R5
C8
R6 R9
Power Good
C14
Vout 1
C11
R7
R8
Vout 2
C12
R14
3004app2-1.9
R15
Notes: Pentium III is trade mark of Intel Corp.
PACKAGE ORDER INFORMATION
Ta (°C)
0 TO 70
0 TO 70
Device
US3004CW
US3005CW
Package
20 pin Plastic SOIC WB
20 pin Plastic SOIC WB
2.5V Output Voltage
Adjustable
Fixed
Rev. 1.2
12/8/00
4-1

1 page




US3005 pdf
BLOCK DIAGRAM
US3004/US3005
V12
V5
D0
D1
D2
D3
D4
Vfb2
Lin2
Enable
UVLO
Vset
Enable
5Bit
DAC,
Ctrl
Logic
Lin1
Vfb1
Vset
+
Slope
Comp
Enable
PWM
Control
Osc
V12
V12
Soft
Start &
Fault
Logic
Enable
Over
Current
200uA
1.1Vset
1.5V
0.9Vset
Vfb3
HDrv
LDrv
CS-
CS+
Ct / En
SS
PGd
Gnd
3004blk2-1.3
Figure 1 - Simplified block diagram of the US3004.
Rev. 1.2
12/8/00
4-5

5 Page





US3005 arduino
US3004/US3005
drooping during a load current step. However if the in-
ductor is too small , the output ripple current and ripple
voltage become too large. One solution to bring the ripple
current down is to increase the switching frequency ,
however that will be at the cost of reduced efficiency and
higher system cost. The following set of formulas are
derived to achieve the optimum performance without
many design iterations.
The maximum output inductance is calculated using the
following equation :
L = ESR *C *(Vinm in -Vom ax )/(2*I )
Where :
Vinmin = Minimum input voltage
For Vo = 2.8 V , I = 14.2 A
L =0.006 * 9000 * ( 4.75 - 2.8) / (2 * 14.2) = 3.7 uH
Assuming that the programmed switching frequency is
set at 200 KHZ , an inductor is designed using the
Micrometals’ powder iron core material. The summary
of the design is outlined below :
The selected core material is Powder Iron , the
selected core is T50-52D from Micro Metal wounded
with 8 Turns of # 16 AWG wire, resulting in 3 uH
inductance with 3 mof DC resistance.
Assuming L = 3 uH and the switching frequency ; Fsw =
200 KHZ , the inductor ripple current and the output
ripple voltage is calculated using the following set of
equations :
T = 1/Fsw
T Switching Period
D ( Vo + Vsync ) / ( Vin - Vsw + Vsync )
D Duty Cycle
Ton = D * T
Vsw High side Mosfet ON Voltage = Io * Rds
Rds Mosfet On Resistance
Toff = T - Ton
Vsync Synchronous MOSFET ON Voltage=Io * Rds
Ir = ( Vo + Vsync ) * Toff /L
Ir Inductor Ripple Current
Vo = Ir * ESR
Vo Output Ripple Voltage
In our example for Vo = 2.8V and 14.2 A load , Assum-
ing IRL3103 MOSFET for both switches with maximum
on resistance of 19 m, we have :
T = 1 / 200000 = 5 uSec
Vsw =Vsync= 14.2*0.019=0.27 V
D ( 2.8 + 0.27 ) / ( 5 - 0.27 + 0.27 ) = 0.61
Ton = 0.61 * 5 = 3.1 uSec
Toff = 5 - 3.1 = 1.9 uSec
Ir = ( 2.8 + 0.27 ) * 1.9 / 3 = 1.94 A
Vo = 1.94 * .006 = .011 V = 11 mV
Power Component Selection
Assuming IRL3103 MOSFETs as power components,
we will calculate the maximum power dissipation as fol-
lows:
For high side switch the maximum power dissipation
happens at maximum Vo and maximum duty cycle.
Dmax ( 2.8 + 0.27 ) / ( 4.75 - 0.27 + 0.27 ) = 0.65
Pdh = Dmax * Io^2*Rds(max)
Pdh= 0.65*14.2^2*0.029=3.8 W
Rds(max)=Maximum Rds-on of the MOSFET at 125°C
For synch MOSFET, maximum power dissipation hap-
pens at minimum Vo and minimum duty cycle.
Dmin ( 2 + 0.27 ) / ( 5.25 - 0.27 + 0.27 ) = 0.43
Pds = (1-Dmin)*Io^2*Rds(max)
Pds=(1 - 0.43) * 14.2^2 * 0.029 = 3.33 W
Heatsink Selection
Selection of the heat sink is based on the maximum
allowable junction temperature of the MOSFETS. Since
we previously selected the maximum Rds-on at 125°C,
then we must keep the junction below this temperature.
Selecting TO220 package gives θjc=1.8°C/W ( From the
venders’ datasheet ) and assuming that the selected
heatsink is Black Anodized , the Heat sink to Case ther-
mal resistance is ; θcs=0.05°C/W , the maximum heat
sink temperature is then calculated as :
Ts = Tj - Pd * (θjc + θcs)
Ts = 125 - 3.82 * (1.8 + 0.05) = 118 °C
With the maximum heat sink temperature calculated in
the previous step, the Heat Sink to Air thermal resis-
tance (θsa) is calculated as follows :
Assuming Ta=35 °C
T = Ts - Ta = 118 - 35 = 83 °C Temperature Rise
Above Ambient
θsa = T/Pd
θsa = 83 / 3.82 = 22 °C/W
Next , a heat sink with lower θsa than the one calcu-
lated in the previous step must be selected. One way to
do this is to simply look at the graphs of the “Heat Sink
Temp Rise Above the Ambient” vs. the “Power Dissipa-
tion” given in the heatsink manufacturers’ catalog and
select a heat sink that results in lower temperature rise
than the one calculated in previous step. The following
heat sinks from AAVID and Thermaloy meet this crite-
ria.
Co. Part #
Thermalloy
6078B
AAVID
577002
Rev. 1.2
12/8/00
4-11

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