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PDF UPD78P083 Data sheet ( Hoja de datos )
| Número de pieza | UPD78P083 | |
| Descripción | MOS INTEGRATED CIRCUIT | |
| Fabricantes | NEC | |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD78P083
8-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
The µPD78P083 is a member of the µPD78083 subseries of the 78K/0 series products. It includes an on-chip, 24-Kbyte,
one-time PROM or EPROM.
Because this device can be programmed by users, it is ideally suited for applications involving the evaluation of systems
in development stages, small-scale production of many different products, and rapid development and time-to-market of
a new product.
Caution The µPD78P083DU does not maintain planned reliability when used in your systems’ mass-produced
products. Please use only experimentally or for evaluation purposes during trial manufacture.
The details of functions are described in the user’s manuals. Be sure to read the following manuals before
designing.
µPD78083 Subseries User's Manual
: IEU-1407
78K/0 Series User's Manual — Instructions : IEU-1372
FEATURES
• Pin-compatible with mask ROM version (except VPP pin)
• Internal PROM: 24 Kbytes Note
• µPD78P083DU: Reprogrammable (ideally suited for system evaluation)
• µPD78P083CU, µPD78P083GB: One-time programmable (ideally suited for small-scale production)
• Internal high-speed RAM: 512 bytes Note
• Can be operated in the same supply voltage as the mask ROM version (VDD = 1.8 to 5.5 V)
• Corresponding to QTOPTM Microcontrollers
Note The internal PROM and internal high-speed RAM capacities can be changed by setting the internal memory size
switching register (IMS).
Remark QTOP microcontroller is a general term for microcontrollers which incorporate one-time PROM and are totally
supported by NEC's programming service (from programming to marking, screening and verification).
*
Differs from the mask ROM version in the following points
The same memory mapping as the mask ROM version is enabled by setting the internal memory size switching
register (IMS).
In this document, the term PROM is used in parts common to one-time PROM versions and EPROM versions.
The information in this document is subject to change without notice.
Document No. U11006EJ1V0DS00 (1st edition)
(Previous No. IP-3556)
Date Published June 1996 P
Printed in Japan
*The mark shows major revised points.
© 1995
1 page  
µPD78P083
FUNCTION DESCRIPTION
Item
Internal memory
Memory space
General register
Instruction cycles
Instruction set
I/O ports
A/D converter
Serial interface
Timer
Timer output
Clock output
Buzzer output
Vectored
Maskable interrupts
interrupts
Non-maskable interrupt
Software interrupt
Power supply voltage
Operating ambient temperature
Packages
Function
• PROM: 24 Kbytes Note
• RAM
Internal high-speed RAM: 512 bytes Note
64 Kbytes
8 bits x 32 registers (8 bits x 8 registers x 4 banks)
Instruction execution time variable function is integrated.
0.4 µs/0.8 µs/1.6 µs/3.2 µs/6.4 µs/12.8 µs (@5.0-MHz operation with main system clock)
• 16-bit operation
• Multiply/divide (8 bits x 8 bits, 16 bits ÷ 8 bits)
• Bit manipulation (set, reset, test, Boolean operation)
• BCD adjust, etc.
Total
: 33
• CMOS input
:1
• CMOS input/output : 32
• 8-bit resolution x 8 channels
• 3-wire serial I/O/UART mode selectable: 1 channel
• 8-bit timer/event counter: 2 channels
• Watchdog timer: 1 channel
2 pins (8-bit PWM output enable)
19.5 kHz, 39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz, 2.5 MHz, and
5.0 MHz (@ 5.0-MHz operation with main system clock)
1.2 kHz, 2.4 kHz, 4.9 kHz, and 9.8 kHz
(@ 5.0-MHz operation with main system clock)
Internal : 8 external : 3
Internal : 1
Internal : 1
VDD = 1.8 to 5.5 V
TA = –40 to +85°C
• 42-pin plastic shrink DIP (600 mil)
• 44-pin plastic QFP (10 x 10 mm)
• 42-pin ceramic shrink DIP (with window) (600 mil)
Note Internal PROM and high-speed RAM capacities can be changed by setting the internal memory size switching
register (IMS).
5
5 Page 
BLOCK DIAGRAM
P100/TI5/TO5
P101/TI6/TO6
SI2/RXD/P70
SO2/TXD/P71
SCK2/ASCK/P72
ANI0/P10-
ANI7/P17
AVDD
AVSS
AVREF
INTP1/P01-
INTP3/P03
BUZ/P36
PCL/P35
8-bit TIMER/
EVENT COUNTER 5
8-bit TIMER/
EVENT COUNTER 6
WATCHDOG
TIMER
SERIAL
INTERFACE 2
A/D
CONVERTER
INTERRUPT
CONTROL
BUZZER OUTPUT
CLOCK OUTPUT
CONTROL
78K/0
CPU
CORE
PROM
(24 KBytes)
DATA
MEMORY
(512 Bytes)
VDD VSS VPP
µPD78P083
PORT 0
PORT 1
PORT 3
PORT 5
PORT 7
PORT 10
SYSTEM
CONTROL
P00
P01-P03
P10-P17
P30-P37
P50-P57
P70-P72
P100, P101
RESET
X1
X2
11
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