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PDF UPD784225 Data sheet ( Hoja de datos )

Número de pieza UPD784225
Descripción 16/8-BIT SINGLE-CHIP MICROCONTROLLERS
Fabricantes NEC 
Logotipo NEC Logotipo



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No Preview Available ! UPD784225 Hoja de datos, Descripción, Manual

DATA SHEET
MOS INTEGRATED CIRCUIT
µPD784224, 784225, 784224Y, 784225Y
16/8-BIT SINGLE-CHIP MICROCONTROLLERS
The µPD784224 and 784225 are products of the µPD784225 Subseries in the 78K/IV Series. Besides a high-
speed and high performance CPU, these controllers have ROM, RAM, I/O ports, 8-bit resolution A/D and D/A
converters, timers, serial interfaces, a real-time output port, interrupt functions, and various other peripheral
hardware.
The µPD784224Y and 784225Y are based on the µPD784225 Subseries with the addition of a multimaster-
supporting I2C bus interface.
Flash memory versions, the µPD78F4225 and 78F4225Y, which replace the internal ROM of the mask ROM
version with flash memory, and various development tools are also available.
The functions are explained in detail in the following user’s manuals. Be sure to read this manual when
designing your system.
µPD784225, 784225Y Subseries User’s Manual - Hardware : U12697E
78K/IV Series User’s Manual - Instruction
: U10905E
FEATURES
• I2C bus
• ROM correction
• Inherits peripheral functions of µPD780058Y
Subseries
• Minimum instruction execution time
160 ns (main system clock fXX = 12.5 MHz)
61 µs (subsystem clock fXT = 32.768 kHz)
• I/O port: 67 pins
• Timer/counter: 16-bit timer/counter × 1 unit
8-bit timer/counter × 4 units
• Serial interface: 3 channels
UART/IOE (3-wire serial I/O): 2 channels
CSI (3-wire serial I/O, multi-master supporting I2C
busNote): 1 channel
Note µPD784225Y Subseries only
• Standby function
HALT/STOP/IDLE mode
In power-saving mode: HALT/IDLE mode (with
subsystem clock)
• Clock division function
• Watch timer: 1 channel
• Watchdog timer: 1 channel
• Clock output function
fXX, fXX/2, fXX/22, fXX/23, fXX/24, fXX/25, fXX/26, fXX/27, fXT
selectable
• Buzzer output function
fXX/210, fXX/211, fXX/212, fXX/213 selectable
• A/D converter: 8-bit resolution × 8 channels
• D/A converter: 8-bit resolution × 2 channels
• Supply voltage: VDD = 1.8 to 5.5 V
APPLICATION FIELD
Car audio, portable audio, telephones, etc.
Unless contextually excluded, references in this document to µPD784225 mean µPD784224, 784225, 784224Y,
and 784225Y.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Document No. U12376EJ1V0DS00 (1st edition)
Date Published May 2000 J CP(K)
Printed in Japan
The mark shows major revised points.
©
1997, 2000

1 page




UPD784225 pdf
µPD784224, 784225, 784224Y, 784225Y
CONTENTS
1. DIFFERENCES AMONG MODELS IN µPD784225, 784225Y SUBSERIES .............................. 7
2. MAJOR DIFFERENCES BETWEEN µPD784216Y SUBSERIES AND
µPD780058Y SUBSERIES ............................................................................................................. 8
3. PIN CONFIGURATION (Top View) ............................................................................................... 9
4. BLOCK DIAGRAM ........................................................................................................................ 11
5. PIN FUNCTION ............................................................................................................................... 12
5.1 Port Pins ................................................................................................................................................ 12
5.2 Pins Other Than Port Pins .................................................................................................................. 14
5.3 I/O Circuit Type of Respective Pins and Recommended Connections of Unused Pins ........... 16
6. CPU ARCHITECTURE ................................................................................................................... 20
6.1 Memory Space ...................................................................................................................................... 20
6.2 CPU Registers ...................................................................................................................................... 23
6.2.1 General-purpose registers .......................................................................................................... 23
6.2.2 Control registers .......................................................................................................................... 24
6.2.3 Special function registers (SFRs) ............................................................................................... 25
7. PERIPHERAL HARDWARE FUNCTIONS .................................................................................... 30
7.1 Ports ....................................................................................................................................................... 30
7.2 Clock Generator ................................................................................................................................... 31
7.3 Real-Time Output Port ......................................................................................................................... 33
7.4 Timer ...................................................................................................................................................... 34
7.5 A/D Converter ....................................................................................................................................... 37
7.6 D/A Converter ....................................................................................................................................... 38
7.7 Serial Interface ..................................................................................................................................... 39
7.7.1 Asynchronous serial interface/3-wire serial I/O (UART/IOE) ...................................................... 40
7.7.2 Clocked serial interface (CSI) ..................................................................................................... 42
7.8 Clock Output Function ........................................................................................................................ 43
7.9 Buzzer Output Function ...................................................................................................................... 44
7.10 Edge Detection Function .................................................................................................................... 44
7.11 Watch Timer .......................................................................................................................................... 44
7.12 Watchdog Timer ................................................................................................................................... 45
8. INTERRUPT FUNCTION ................................................................................................................ 46
8.1 Interrupt Sources ................................................................................................................................. 46
8.2 Vectored Interrupt ................................................................................................................................ 48
8.3 Context Switching ................................................................................................................................ 49
8.4 Macro Service ....................................................................................................................................... 49
8.5 Application Example of Macro Service ............................................................................................. 50
Data Sheet U12376EJ1V0DS00
5

5 Page





UPD784225 arduino
µPD784224, 784225, 784224Y, 784225Y
4. BLOCK DIAGRAM
INTP2/NMI
INTP0, INTP1,
INTP3 to INTP5
TI00
TI01
TO0
TI1
TO1
TI2
TO2
PROGRAMMABLE
INTERRUPT
CONTROLLER
TIMER/EVENT
COUNTER
(16 BITS)
TIMER/EVENT
COUNTER1
(8 BITS)
TIMER/EVENT
COUNTER2
(8 BITS)
TIMER/COUNTER5
(8 BITS)
TIMER/COUNTER6
(8 BITS)
WATCH TIMER
RTP0 to RTP7
NMI/INTP2
ANO0
ANO1
AVREF1
AVSS
ANI0 to ANI7
AVDD
AVSS
P03/INTP3
PCL
BUZ
WATCHDOG TIMER
REAL-TIME
OUTPUT PORT
D/A
CONVERTER
A/D
CONVERTER
CLOCK OUTPUT
CONTROL
BUZZER OUTPUT
78K/IV
CPU CORE
ROM
RAM
UART/IOE1
BAUD-RATE
GENERATOR
UART/IOE2
BAUD-RATE
GENERATOR
CLOCKED
SERIAL
INTERFACE
BUS I/F
PORT0
PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
PORT12
PORT13
SYSTEM CONTROL
RxD1/SI1
TxD1/SO1
ASCK1/SCK1
RxD2/SI2
TxD2/SO2
ASCK2/SCK2
SI0/SDA0Note
SO0
SCK0/SCL0Note
AD0 to AD7
A8 to A15
A16 to A19
RD
WR
WAIT
ASTB
EXA
P00 to P05
P10 to P17
P20 to P27
P30 to P37
P40 to P47
P50 to P57
P60 to P67
P70 to P72
P120 to P127
P130, P131
RESET
X1
X2
XT1
XT2
VDD0, VDD1
VSS0, VSS1
TEST
Note This function supports the I2C bus interface and is available in µPD784225Y Subseries only.
Remark The internal ROM and RAM capacities differ depending on the model.
Data Sheet U12376EJ1V0DS00
11

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