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PDF UPD784031GC-3B9 Data sheet ( Hoja de datos )

Número de pieza UPD784031GC-3B9
Descripción 16/8-BIT SINGLE-CHIP MICROCONTROLLER
Fabricantes NEC 
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No Preview Available ! UPD784031GC-3B9 Hoja de datos, Descripción, Manual

DATA SHEET
MOS INTEGRATED CIRCUIT
µPD784031
16/8-BIT SINGLE-CHIP MICROCONTROLLER
The µPD784031 is a product of the µPD784038 sub-series in the 78K/IV series. It contains various peripheral
hardware such as RAM, I/O ports, 8-bit resolution A/D and D/A converters, timers, serial interface, and interrupt
functions, as well as a high-speed, high-performance CPU.
The µPD784031 is a ROM-less product of the µPD784035 and µPD784036.
For specific functions and other detailed information, consult the following user’s manual.
This manual is required reading for design work.
µPD784038, 784038Y Sub-Series User’s Manual, Hardware : U11316E
78K/IV Series User’s Manual, Instruction
: U10905E
Features
• Pin-compatible with the µPD78234, µPD784026, and
µPD784038Y sub-series
• Minimum instruction execution time: 125 ns
(at 32 MHz)
• Number of I/O ports: 46
• Serial interface: 3 channels
UART/IOE (3-wire serial I/O): 2 channels
CSI (3-wire serial I/O, 2-wire serial I/O): 1 channel
• PWM outputs: 2
• Timer/counters
16-bit timer/counter × 3 units
16-bit timer × 1 unit
• Standby function
HALT/STOP/IDLE mode
• Clock frequency division function
• Watchdog timer: 1 channel
• A/D converter: 8-bit resolution × 8 channels
• D/A converter: 8-bit resolution × 2 channels
• Power supply voltage: VDD = 2.7 to 5.5 V
Applications
LBP, automatic-focusing camera, PPC, printer, electronic typewriter, air conditioner, electronic musical instru-
ments, cellular telephone, etc.
Ordering Information
Part number
µPD784031GC-3B9
µPD784031GC-8BT
µPD784031GK-BE9
Package
80-pin plastic QFP (14 × 14 × 2.7 mm)
80-pin plastic QFP (14 × 14 × 1.4 mm)
80-pin plastic TQFP (fine pitch) (12 × 12 mm)
Internal ROM
(bytes)
None
None
None
Internal RAM
(bytes)
2 048
2 048
2 048
The information in this document is subject to change without notice.
Document No. U11507EJ1V0DS00 (1st edition)
Date Published March 1997 J
Printed in Japan
The mark shows major revised points.
©
1997

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UPD784031GC-3B9 pdf
µPD784031
10. LOCAL BUS INTERFACE ..........................................................................................................
10.1 Memory Expansion ..........................................................................................................................
10.2 Memory Space ..................................................................................................................................
10.3 Programmable Wait .........................................................................................................................
10.4 Pseudo-Static RAM Refresh Function ..........................................................................................
10.5 Bus Hold Function ...........................................................................................................................
47
47
48
49
49
49
11. STANDBY FUNCTION ................................................................................................................ 50
12. RESET FUNCTION ..................................................................................................................... 51
13. INSTRUCTION SET .................................................................................................................... 52
14. ELECTRICAL CHARACTERISTICS .......................................................................................... 57
15. PACKAGE DRAWINGS.............................................................................................................. 77
16. RECOMMENDED SOLDERING CONDITIONS ......................................................................... 80
APPENDIX A DEVELOPMENT TOOLS ...................................................................................... 82
APPENDIX B RELATED DOCUMENTS ...................................................................................... 84
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UPD784031GC-3B9 arduino
5. BLOCK DIAGRAM
NMI
INTP0-INTP5
INTP3
TO0
TO1
INTP0
INTP1
INTP2/CI
TO2
TO3
P00-P03
P04-P07
PWM0
PWM1
ANO0
ANO1
AVREF2
AVREF3
ANI0-ANI7
AVDD
AVREF1
AVSS
INTP5
Programmable
interrupt controller
Timer/counter 0
(16 bits)
Timer/counter 1
(16 bits)
Timer/counter 2
(16 bits)
Timer 3
(16 bits)
Real-time output
port
PWM
D /A converter
A /D converter
78K /IV
CPU core
RAM
Watchdog timer
µPD784031
UART/IOE2
Baud-rate
generator
UART/IOE1
Baud-rate
generator
Clocked serial
interface
Bus interface
Port 0
Port 1
Port 2
Port 3
Port 6
Port 7
System control
RxD/SI1
TxD/SO1
ASCK/SCK1
RxD2/SI2
TxD2/SO2
ASCK2/SCK2
SCK0/SCL
SO0/SDA
SI0
ASTB
AD0-AD7
A8-A15
A16-A19
RD
WR
WAIT/HLDRQ
REFRQ/HLDAK
P00-P07
P10-P17
P20-P27
P30-P37
P60-P63
P66, P67
P70-P77
RESET
TEST
X1
X2
VDD0, VDD1
VSS0, VSS1
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