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PDF UPD784021 Data sheet ( Hoja de datos )
| Número de pieza | UPD784021 | |
| Descripción | 16/8-BIT SINGLE-CHIP MICROCOMPUTER | |
| Fabricantes | NEC | |
| Logotipo |  |
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DATA SHEET
MOS INTEGRATED CIRCUIT
mPD784020, 784021
16/8-BIT SINGLE-CHIP MICROCOMPUTER
The mPD784021 is a product of the mPD784026 sub-series in the 78K/IV series. It contains various peripheral
hardware such as RAM, I/O ports, 8-bit resolution A/D and D/A converters, timers, serial interface, and interrupt
functions, as well as a high-speed, high-performance CPU.
The mPD784021 is a ROM-less product of the mPD784025 or mPD784026.
The mPD784020 differs from the mPD784021 only in its RAM size: 512 bytes are allocated for the mPD784020,
while 2048 bytes are allocated for the mPD784021.
For specific functions and other detailed information, consult the following user’s manual.
This manual is required reading for design work.
mPD784026 Sub-Series User’s Manual, Hardware : U10898E
78K/IV Series User’s Manual, Instruction
: U10905E
FEATURES
• 78K/IV series
• Pin-compatible with the mPD78234 sub-series
• Minimum instruction execution time: 160 ns
(at 25 MHz)
• Number of I/O ports: 46
• Timer/counters: 16-bit timer/counter ¥ 3 units
16-bit timer ¥ 1 unit
• Serial interface: 3 channels
UART/IOE (3-wire serial I/O) :2 channels
CSI (3-wire serial I/O, SBI) : 1 channel
• PWM outputs: 2
• Standby function
HALT/STOP/IDLE mode
• Clock frequency division function
• Watchdog timer : 1 channel
• A/D converter : 8-bit resolution ¥ 8 channels
• D/A converter : 8-bit resolution ¥ 2 channels
• Supply voltage : VDD = 2.7 to 5.5 V
APPLICATIONS
LBP, automatic-focusing camera, PPC, printer, electronic typewriter, air conditioner, electronic musical instru-
ments, cellular telephone, etc.
This manual describes the mPD784021 unless otherwise specified.
The information in this document is subject to change without notice.
Document No. U11514EJ1V0DS00 (1st edition)
(Previous No. IP-3234)
Date Published July 1996 P
Printed in Japan
The mark H shows major revised points.
©
199960
1 page  
mPD784020, 784021
10. LOCAL BUS INTERFACE .........................................................................................................
10.1 MEMORY EXPANSION ..................................................................................................................
10.2 MEMORY SPACE ...........................................................................................................................
10.3 PROGRAMMABLE WAIT ...............................................................................................................
10.4 PSEUDO-STATIC RAM REFRESH FUNCTION ...........................................................................
10.5 BUS HOLD FUNCTION ..................................................................................................................
49
49
50
51
51
51
11. STANDBY FUNCTION .............................................................................................................. 52
12. RESET FUNCTION .................................................................................................................... 53
13. INSTRUCTION SET ................................................................................................................... 54
14. ELECTRICAL CHARACTERISTICS ......................................................................................... 59
15. PACKAGE DRAWINGS ............................................................................................................ 80
16. RECOMMENDED SOLDERING CONDITIONS ........................................................................ 82
APPENDIX A DEVELOPMENT TOOLS ........................................................................................ 83
APPENDIX B RELATED DOCUMENTS ....................................................................................... 85
H
H
5
5 Page 
mPD784020, 784021
5. BLOCK DIAGRAM
NMI
INTP0-INTP5
INTP3
TO0
TO1
INTP0
INTP1
INTP2/CI
TO2
TO3
P00-P03
P04-P07
PWM0
PWM1
ANO0
ANO1
AVREF2
AVREF3
ANI0-ANI7
AVDD
AVREF1
AVSS
INTP5
Programmable
interrupt controller
Timer/counter 0
(16 bits)
Timer/counter 1
(16 bits)
Timer/counter 2
(16 bits)
Timer 3
(16 bits)
Real-time output
port
PWM
D /A converter
A /D converter
78K /IV
CPU core
RAM
Watchdog timer
UART/IOE2
Baud-rate
generator
UART/IOE1
Baud-rate
generator
Clocked serial
interface
Bus interface
Port 0
Port 1
Port 2
Port 3
Port 6
Port 7
System control
RxD/SI1
TxD/SO1
ASCK/SCK1
RxD2/SI2
TxD2/SO2
ASCK2/SCK2
SCK0
SO0/SB0
SI0
ASTB
AD0-AD7
A8-A15
A16-A19
RD
WR
WAIT/HLDRQ
REFRQ/HLDAK
P00-P07
P10-P17
P20-P27
P30-P37
P60-P63
P60, P67
P70-P77
RESET
TEST
X1
X2
VDD
VSS
Remark The internal ROM or RAM capacity differs for each product.
11
11 Page | ||
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