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PDF UPD753204GT Data sheet ( Hoja de datos )

Número de pieza UPD753204GT
Descripción 4-BIT SINGLE-CHIP MICROCONTROLLERS
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD753204, 753206, 753208
4-BIT SINGLE-CHIP MICROCONTROLLERS
The µPD753208 is one of the 75XL Series 4-bit single-chip microcontrollers and has a data processing
capability comparable to that of an 8-bit microcontroller.
The µPD753208 has an on-chip LCD controller/driver and is based on the µPD75308B of the 75X Series.
However, the µPD75308B is supplied in an 80-pin package, whereas the µPD753208 is supplied in a 48-
pin package (375 mils, 0.65-mm pitch) and therefore is suitable for small-scale application systems. In
addition, the µPD753208 features expanded CPU functions and performs high-speed operations at a low
voltage of 1.8 V.
Detailed information about functions can be found in the following user’s manual. Be sure to read it
before designing. µPD753208 User’s Manual: U10158E
Features
• Low-voltage operation: VDD = 1.8 to 5.5 V
– Can be driven by two 1.5-V batteries
• Internal memory
– Program memory (ROM):
4096 × 8 bits (µPD753204)
6144 × 8 bits (µPD753206)
8192 × 8 bits (µPD753208)
– Data memory (RAM):
512 × 4 bits
• Variable instruction execution time for high-speed
operation and power saving operation
– 0.95, 1.91, 3.81, 15.3 µs (@ 4.19-MHz operation)
– 0.67, 1.33, 2.67, 10.7 µs (@ 6.0-MHz operation)
• Internal programmable LCD controller/driver
• Small package:
48-pin plastic shrink SOP (375 mils, 0.65-mm pitch)
• One-time PROM version: µPD75P3216
Applications
Remote controllers, Cameras, Sphygnomamometers, Compact-disc radio cassette player compo systems,
gas meters, etc.
Ordering Information
Part number
µPD753204GT-×××
µPD753206GT-×××
µPD753208GT-×××
Package
48-pin plastic shrink SOP (375 mils, 0.65-mm pitch)
48-pin plastic shrink SOP (375 mils, 0.65-mm pitch)
48-pin plastic shrink SOP (375 mils, 0.65-mm pitch)
ROM (× 8 bits)
4096
6144
8192
Remark ××× indicates ROM code suffix.
Unless otherwise specified, references in this data sheet to the µPD753208 mean the
µPD753204 and the µPD753206.
The information in this document is subject to change without notice.
Document No. U10166EJ2V0DS00 (2nd edition)
Date Published March 1997 N
Printed in Japan
The mark shows major revised points.
© 1996

1 page




UPD753204GT pdf
µPD753204, 753206, 753208
1. PIN CONFIGURATION (TOP VIEW)
48-pin plastic shrink SOP (375 mils, 0.65-mm pitch)
µPD753204GT-×××, µPD753206GT-×××,
µPD753208GT-×××
COM0
COM1
COM2
COM3
BIAS
VLC0
VLC1
VLC2
P30/LCDCL
P31/SYNC
P32
P33
VSS
P50
P51
P52
P53
P60/KR0
P61/KR1
P62/KR2
P63/KR3
VDD
X1
X2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 S12
47 S13
46 S14
45 S15
44 P93/S16
43 P92/S17
42 P91/S18
41 P90/S19
40 P83/S20
39 P82/S21
38 P81/S22
37 P80/S23
36 P23/BUZ
35 P22/PCL/PTO2
34 P21/PTO1
33 P20/PTO0
32 P13/TI0
31 P10/INT0
30 P03/SI/SB1
29 P02/SO/SB0
28 P01/SCK
27 P00/INT4
26 RESET
25 IC Note
Note Connect IC (Internally Connected) pin directly to VDD.
Pin Identification
P00 to P03
: Port0
P10, P13
: Port1
P20 to P23
: Port2
P30 to P33
: Port3
P50 to P53
: Port5
P60 to P63
: Port6
P80 to P83
: Port8
P90 to P93
: Port9
KR0 to KR3 : Key Return 0 to 3
COM0 to COM3 : Common Output 0 to 3
SCK
: Serial Clock
SI : Serial Input
SO : Serial Output
SB0, SB1
: Serial Data Bus 0, 1
S12 to S23 : Segment Output 12 to 23
VLC0 to VLC2 : LCD Power Supply 0 to 2
BIAS
: LCD Power Supply Bias Control
LCDCL
: LCD Clock
SYNC
: LCD Synchronization
TI0 : Timer Input 0
PTO0 to PTO2 : Programmable Timer Output 0 to 2
BUZ
: Buzzer Clock
PCL
: Programmable Clock
INT0, INT4 : External Vectored Interrupt 0, 4
X1, X2
: System Clock Oscillation 1, 2
RESET
: Reset
IC : Internally Connected
VDD : Positive Power Supply
VSS : Ground
5

5 Page





UPD753204GT arduino
µPD753204, 753206, 753208
3.3 Pin Input/Output Circuits
The µPD753208 pin input/output circuits are shown schematically.
TYPE A
TYPE D
VDD
P-ch
IN
N-ch
data
output
disable
(1/2)
VDD
P-ch
OUT
N-ch
CMOS specification input buffer.
TYPE B
IN
Schmitt trigger input having hysteresis characteristic.
Push-pull output that can be placed in output
high-impedance (both P-ch, N-ch off).
TYPE E-B
data
output
disable
P.U.R.
enable
Type D
VDD
P.U.R.
P-ch
IN/OUT
Type A
TYPE B-C
VDD
P.U.R.
P-ch
P.U.R.
enable
IN
P.U.R. : Pull-Up Resistor
P.U.R. : Pull-Up Resistor
TYPE F-A
data
output
disable
P.U.R.
enable
Type D
VDD
P.U.R.
P-ch
IN/OUT
Type B
P.U.R. : Pull-Up Resistor
11

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