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PDF UPD75048CW Data sheet ( Hoja de datos )
| Número de pieza | UPD75048CW | |
| Descripción | 4-BIT SINGLE-CHIP MICROCOMPUTER | |
| Fabricantes | NEC | |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD75048
4-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
The µPD75408 is a 4-bit single-chip microcomputer whose data processing capability is comparative to that
of an 8-bit microcomputer.
The µPD75048 employs a CPU whose minimum instruction execution time is 0.95 µs, and contains the
EEPROM, A/D converter, multi-function timer, and high performance hardware to provide high cost to
performance ratio.
Detailed functions are described in the following user's manual. Read this manual when designing your
system.
µPD75048 User's Manual: IEU-704
FEATURES
• Built-in EEPROM: 1024 x 4 bits (data memory area) • I/O ports: 48 pins
• Built-in 8-bit resolution A/D converter (successive • Middle voltage N-ch open drain input/output
approximation): 8 channels
ports: 12 pins
• Capable of operating at low voltage: VDD = 2.7 to • 43 I/O lines can be provided with internal pull-
6.0 V
down resistors
• Reference voltage can be arbitrarily specified • PROM version is available: µPD75P048
between AVREF+ and AVREF-.
(One-time PROM)
• Built-in multi-function timer which can provide the
following functions:
• 8-bit timer
• PWM output
• 16-bit free running timer
• 16-bit integration type A/D converter counter
APPLICATIONS
• Consumer electronics products, telephones, cameras, automobile audio equipment, electronics measurement
equipment, etc.
ORDERING INFORMATION
Part Number
µPD75048CW-xxx
µPD75048GC-xxx-AB8
Package
64-pin plastic shrink DIP (750 mil)
64-pin plastic QFP ( 14mm)
Quality grade
Standard
Standard
Remarks: xxx is ROM code number.
Please refer to “Quality Grade on NEC Semiconductor Devices” (Document Number IEI-1209) published by
NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
The information in this document is subject to change without notice.
Document No. IC - 2518C
(O. D. No. IC - 7931C)
Date Published February 1994 P
Printed in Japan
The mark 5 shows major revised points.
© NEC Corporation 1990
1 page  
1. PIN CONFIGURATION (TOP VIEW)
• 64-PIN PLASTIC SHRINK DIP (750 mil)
SB1/SI/P03
SB0/SO/P02
SCK/P01
INT4/P00
BUZ/P23
PCL/P22
PCO/P21
PTO0/P20
MAT/P103
MAZ/P102
MAI/P101
MAR/P100
RESET
X1
X2
IC
XT1
XT2
VDD
AVDD
AVREF+
AVREF–
AN7
AN6
AN5
AN4
AN3/P113
AN2/P112
AN1/P111
AN0/P110
AVSS
TI0/P13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
µPD75048
64 VSS
63 P30
62 P31
61 P32
60 P33
59 P40
58 P41
57 P42
56 P43
55 P50
54 P51
53 P52
52 P53
51 P60/KR0
50 P61/KR1
49 P62/KR2
48 P63/KR3
47 P70/KR4
46 P71/KR5
45 P72/KR6
44 P73/KR7
43 P80
42 P81
41 P82
40 P83
39 P90
38 P91
37 P92
36 P93
35 P10/INT0
34 P11/INT1
33 P12/INT2
IC : Internally Connected (Connect directly to VDD)
5
5 Page 
µPD75048
3.2 NON PORT PINS
Also Served
Pin Name Input/Output As
Functon
TI0
PTO0
PCL
BUZ
SCK
SO/SB0
SI/SB1
Input
Input/
Output
Input/
Output
Input/
Output
Input/
Output
Input/
Output
Input/
Output
INT4
Input
INT0
INT1
Input
INT2
Input
P13 Timer/event counter external event pulse input
P20 Timer/event counter output
P22 Clock output
P23
Arbitrary frequency output(for buzzer or for
trimming the system clock)
P01 Serial clock input/output
Serial data output
P02 Serial bus input/output
Serial data input
P03 Serial bus input/output
Edge detection vector interrupt input (both
P00 rising and falling edge detection are effective)
P10 Edge detection vector
Clock synchronous
interrupt input (detection
edge is selectable)
P11 Asynchronous
Edge detection vector
interrupt input (rising
P12 edge is detected.)
Asynchronous
When Reset
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input/
Output
Circuit
TYPE*1
B-C
E-B
E-B
E-B
F-A
F-B
M-C
B
B-C
B-C
KR0-KR3
KR4-KR7
MAR
MAI
MAZ
MAT
PPO
Input/
Output
Input/
Output
Input/
Output
Input/
Output
Input/
Output
Input/
Output
Input/
Output
P60-63 Parallel falling edge detection testable input
P70-73
P100
P101
P102
Parallel falling edge detection testable input
Reference integration
signal output
In the MFT
integration type A/
D converter mode
Integration signal output
Auto zero signal output
P103
P21
In the MFT timer
mode
Comparator input
Timer pulse output
Input
Input
*2
Input
F-A
F-A
M
E-B
*1: Circles indicate Schmitt trigger inputs.
2: High level (with internal pull-up resistor) or high impedence
Remarks: MFT: Multi-function timer
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet UPD75048CW.PDF ] | |
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