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PDF V827316K04S Data sheet ( Hoja de datos )

Número de pieza V827316K04S
Descripción 2.5 VOLT 16M x 72 HIGH PERFORMANCE UNBUFFERED ECC DDR SDRAM MODULE
Fabricantes Mosel Vitelic Corp 
Logotipo Mosel Vitelic  Corp Logotipo



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MOSEL VITELIC
V827316K04S
2.5 VOLT 16M x 72 HIGH PERFORMANCE
UNBUFFERED ECC DDR SDRAM MODULE
PRELIMINARY
Features
184 Pin Unbuffered 16,777,216 x 72 bit
Organization DDR SDRAM Modules
Utilizes High Performance 16M x 8 DDR
SDRAM in TSOPII-66 Packages
Single +2.5V (± 0.2V) Power Supply
Programmable CAS Latency, Burst Length, and
Wrap Sequence (Sequential & Interleave)
Auto Refresh (CBR) and Self Refresh
All Inputs, Outputs are SSTL-2 Compatible
4096 Refresh Cycles every 64 ms
Serial Presence Detect (SPD)
DDR SDRAM Performance
Component Used -7 -75 -8 Units
tCK Clock Frequency
(max.)
143 133 125 MHz
(PC266A) (PC266B) (PC200)
tAC Clock Access Time
7
7.5
8 ns
CAS Latency = 2.5
Description
The V827316K04S memory module is organized
16,777,216 x 72 bits in a 184 pin memory module.
The 16M x 72 memory module uses 9 Mosel-Vitelic
16M x 8 DDR SDRAM. The x72 modules are ideal
for use in high performance computer systems
where increased memory density and fast access
times are required.
Module Speed
A1 PC1600 (100MHz @ CL2)
B0 PC2100B (133MHz @ CL2.5)
B1 PC2100A (133MHz @ CL2)
V827316K04S Rev. 1.6 March 2002
1

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V827316K04S pdf
MOSEL VITELIC
V827316K04S
Serial Presence Detect Information (cont.)
Byte #
Function described
29 Minimum RAS to CAS delay(=tRCD)
30 Minimum active to precharge time(=tRAS)
31 Module ROW density
32 Command and address signal input setup time
33 Command and address signal input hold time
34 Data signal input setup time
35 Data signal input hold time
36-40 Superset information (may be used in future)
41
42
43
44
45
46-61
SDRAM device minimum active to active/auto-refresh time
(=tRC)
SDRAM device minimum active to autorefresh to active/auto-refresh
time (=tRFC)
SDRAM device maximum device cycle time (=tCK MAX)
SDRAM device maximum skew between DQS and DQ signals
(=tDQSQ)
SDRAM device maximum read datahold skew factor (=tQHS)
Superset information (may be used in future)
62 SPD data revision code
63 Checksum for Bytes 0 ~ 62
64 Manufacturer JEDEC ID code
65 -71 ....... Manufacturer JEDEC ID code
72 Manufacturing location
73-90 Module part number (ASCII)
91 Manufacturer revison code (For PCB)
92 Manufacturer revison code (For component)
93 Manufacturing date (Week)
94 Manufacturing date (Year)
95~98 Assembly serial #
99~127 Manufacturer specific data (may be used in future)
128~255 Open for customer use
Function Supported
A1 B0 B1
20ns 20ns 18ns
50ns 45ns 45ns
128MB
1.1ns 0.9ns 0.9ns
1.1ns 0.9ns 0.9ns
0.6ns 0.5ns 0.5ns
0.6ns 0.5ns 0.5ns
-
70ns 65ns 60ns
Hex value
A1 B0 B1
50h 50h 48h
32h 2Dh 2Dh
20h
B0h 90h 90h
B0h 90h 90h
60h 50h 50h
60h 50h 50h
00h
46h 41h 3Ch
80ns 75ns 67ns 50h 4Bh 43h
12ns 12ns 12ns 30h 30h 30h
0.6ns 0.5ns 0.5ns 3Ch 32h 32h
1ns 0.75ns 0.75ns A0h 75h 75h
- 00h
Initial release
00h
- D6h 1Ch BBh
Mosel Vitelic
40h
Mosel Vitelic
40h
01h
V827316K04S
0 00
0 00
--
--
--
Undefined
00h
Undefined
00h
V827316K04S Rev. 1.6 March 2002
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V827316K04S arduino
MOSEL VITELIC
Package Dimensions
1.25 ± 0.006
(31.75 ±0.15)
5.25 ± 0.006
(133.350 ± 0.15)
5.077
(128.950)
V827316K04S
0.089
(2.26)
Units : Inches (Millimeters)
AB
2.55
(64.77)
1.95
(49.53)
2.500
0.10 M C B A
0.098 Max
(2.47 Max)
0.26
(6.62)
0.250
(6.350)
2.175
0.071
(1.80)
Detail A
0.157
(4.00)
0.1496
(3.80)
Tolerances : ± 0.005(.13) unless otherwise specified.
The used device is 8Mx16 SDRAM, TSOP.
SDRAM Part NO : K4H281638B-TC
0.050 ± 0.0039
(1.270 ± 0.10)
0.039 ± 0.002
(1.000 ± 0.050)
0.0078 ±0.006
(0.20 ±0.15)
0.118
(3.00)
0.0787
(2.00)
0.050
(1.270)
Detail B
0.1575
(4.00)
0.10 M C A M B
V827316K04S Rev. 1.6 March 2002
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