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PDF V53C16258H Data sheet ( Hoja de datos )

Número de pieza V53C16258H
Descripción HIGH PERFORMANCE 256K X 16 EDO PAGE MODE CMOS DYNAMIC RAM OPTIONAL SELF REFRESH
Fabricantes Mosel Vitelic Corp 
Logotipo Mosel Vitelic  Corp Logotipo



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No Preview Available ! V53C16258H Hoja de datos, Descripción, Manual

MOSEL VITELIC
V53C16258H
HIGH PERFORMANCE
256K X 16 EDO PAGE MODE
CMOS DYNAMIC RAM
OPTIONAL SELF REFRESH
PRELIMINARY
HIGH PERFORMANCE
Max. RAS Access Time, (tRAC)
Max. Column Address Access Time, (tCAA)
Min. Extended Data Out Mode Cycle Time, (tPC)
Min. Read/Write Cycle Time, (tRC)
25
25 ns
13 ns
10 ns
45 ns
30
30 ns
16 ns
12 ns
60 ns
35
35 ns
18 ns
14 ns
70 ns
40
40 ns
20 ns
15 ns
75 ns
45
45 ns
22 ns
17 ns
80 ns
50
50 ns
24 ns
19 ns
90 ns
Features
s 256K x 16-bit organization
s EDO Page Mode for a sustained data rate of
100 MHz
s RAS access time: 25, 30, 35, 40, 45, 50 ns
s Dual CAS Inputs
s Low power dissipation
s Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh
s Optional Self Refresh (V53C16258SH)
s Refresh Interval: 512 cycles/8 ms
s Available in 40-pin 400 mil SOJ and 40/44L-pin
400 mil TSOP-II packages
s Single +5V ±10% Power Supply
s TTL Interface
Description
The V53C16258H is a high speed 262,144 x 16
bit high performance CMOS dynamic random
access memory. The V53C16258H offers a
combination of unique features including: EDO
Page Mode operation for higher sustained
bandwidth with Page Mode cycle times as short as
10ns. All inputs are TTL compatible. Input and
output capicatance is significantly lowered to
increase performance and minimize loading. These
features make the V53C16258H ideally suited for a
wide variety of high performance computer systems
and peripheral applications.
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Power
Temperature
K
T
25 30 35 40 45 50
Std.
Mark
0°C to 70°C
• ••••••
Blank
–40°C to +85°C
• ••••••
I
V53C16258H Rev. 3.8 November 1999
1

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V53C16258H pdf
MOSEL VITELIC
V53C16258H
AC Characteristics
TA = 0°C to 70°C, VCC = 5 V ± 10%, VSS = 0V unless otherwise noted
AC Test conditions, input pulse levels 0 to 3V
# Symbol Parameter
1 tRAS
RAS Pulse Width
2 tRC
Read or Write Cycle Time
3 tRP
RAS Precharge Time
4 tCSH
CAS Hold Time
5 tCAS
CAS Pulse Width
6 tRCD
RAS to CAS Delay
7 tRCS
Read Command Setup Time
8 tASR
Row Address Setup Time
9 tRAH
Row Address Hold Time
10 tASC
Column Address Setup Time
11 tCAH
Column Address Hold Time
12 tRSH (R) RAS Hold Time (Read Cycle)
13 tCRP
CAS to RAS Precharge Time
14 tRCH
Read Command Hold Time
Referenced to CAS
15 tRRH
Read Command Hold Time
Referenced to RAS
16 tROH
RAS Hold Time Referenced
to OE
17 tOAC
18 tCAC
19 tRAC
20 tCAA
Access Time from OE
Access Time from CAS
Access Time from RAS
Access Time from Column
Address
21 tLZ
22 tHZ
23 tAR
OE or CAS to Low-Z Output
OE or CAS to High-Z Output
Column Address Hold Time
from RAS
24 tRAD
RAS to Column Address
Delay Time
25 tRSH (W) RAS or CAS Hold Time in
Write Cycle
26 tCWL
Write Command to CAS
Lead Time
27 tWCS
28 tWCH
Write Command Setup Time
Write Command Hold Time
25
(100 MHz) 30 35 40 45 50
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit Notes
25 75K 30 75K 35 75K 40 75K 45 75K 50 75K ns
45 60 70 75 80 90 ns
15 20 25 25 25 30 ns
25 30 35 40 45 50 ns
4 5 6 7 8 9 ns
10 17 12 20 13 24 15 28 18 32 19 36 ns 4
0 0 0 0 0 0 ns
0 0 0 0 0 0 ns
4 5 6 7 8 9 ns
0 0 0 0 0 0 ns
4 5 5 5 6 7 ns
7 9 10 10 10 10 ns
5 5 5 5 5 5 ns
0 0 0 0 0 0 ns 5
0 0 0 0 0 0 ns 5
4 6 7 8 9 10 ns
8 10 11 12 13 14 ns 12
8 10 11 12 13 14 ns 6, 7, 14
25 30 35 40 45 50 ns 6, 8, 9
13 16 18 20 22 24 ns 6, 7, 10
0 0 0 0 0 0 ns 16
0 5 0 5 0 6 0 6 0 7 0 8 ns 16
19 23 25 30 35 40 ns
8 13 9 14 10 17 12 20 13 23 14 26 ns 11
7 9 10 10 10 10 ns
5 7 8 10 13 14 ns
0 0 0 0 0 0 ns 12, 13
4 5 5 5 6 7 ns
V53C16258H Rev. 3.8 November 1999
5

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V53C16258H arduino
MOSEL VITELIC
V53C16258H
Waveforms of EDO Page Mode Read Cycle
V IH
RAS
V IL
V IH
UCAS, LCAS
V IL
ADDRESS V IH
V IL
V IH
WE
V IL
V IH
OE
V IL
V OH
I/O
V OL
t AR (23)
t RCD (6)
t CRP (13)
tRAS (1)
t RP (3)
t PC (42)
t CP (43)
t CAS (5)
t RSH (R)(12)
tCAS (5)
t CRP (13)
t CAS (5)
t ASR (8)
t RAH (9)
tASC (10)
t CSH (4)
tASC (10)
t CAH (11)
ROW
ADDRESS
t RCS (7)
COLUMN
ADDRESS
COLUMN
ADDRESS
t RCH (14)
t CAH (11)
t RCS (7)
tCAR (44)
t CAH (11)
COLUMN
ADDRESS
t RCS (7)
t RCH (14)
t CAA (20)
t OAC (17)
t RAC (19)
t CAC (18)
t LZ (21)
t CAP (45)
t OES (52)
t CAC (18)
tCOH (5)
VALID
DATA OUT
tCAA (20)
t OAC (17)
t RRH (15)
VALID
DATA OUT
tOEP (54)
tCAC (18)
t HZ (22)
VALID
DATA OUT
t LZ
t HZ (22)
t HZ (22)
t HZ (22)
16258H-09
Waveforms of EDO Page Mode Write Cycle
RAS V IH
V IL
V IH
UCAS, LCAS
V IL
V IH
ADDRESS
V IL
WE V IH
V IL
VIH
OE
VIL
V IH
I/O
V IL
t AR (23)
t RAS (1)
t RP (3)
t CRP (13)
t RCD (6)
t PC (42)
t CP (43)
t CAS (5)
t CAS (5)
t RSH (W)(25)
t CAS (5)
t RAH (9)
t ASR (8)
t CSH (4)
t ASC (10)
t CAH (11)
ROW
ADD
t RAD (24)
t WCS (27)
COLUMN
ADDRESS
t CWL (26)
t WCS (27)
t WCH (28)
t WP (29)
t ASC (10)
t CAH (11)
COLUMN
ADDRESS
t CWL (26)
t WCS (27)
t WCH (28)
t WP (29)
t CAR (44)
t CAH (11)
COLUMN
ADDRESS
t CWL (26)
t RWL (31)
tWCH (28)
tWP (29)
t DS (32)
t DH (33)
t DS (32)
VALID
DATA IN
OPEN
t DH (33) t DS (32)
VALID
DATA IN
t DH (33)
VALID
DATA IN
OPEN
t CRP (13)
16258H-10
V53C16258H Rev. 3.8 November 1999
11
Don’t Care
Undefined

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