|
|
PDF V53C16256SH Data sheet ( Hoja de datos )
| Número de pieza | V53C16256SH | |
| Descripción | 256K X 16 FAST PAGE MODE CMOS DYNAMIC RAM WITH SELF REFRESH | |
| Fabricantes | Mosel Vitelic Corp | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de V53C16256SH (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
|
No Preview Available !
MOSEL VITELIC
V53C16256SH
256K X 16 FAST PAGE MODE
CMOS DYNAMIC RAM WITH
SELF REFRESH
PRELIMINARY
HIGH PERFORMANCE
Max. RAS Access Time, (tRAC)
Max. Column Address Access Time, (tCAA)
Min. Fast Page Mode Cycle Time, (tPC)
Min. Read/Write Cycle Time, (tRC)
Features
s 256K x 16-bit organization
s Fast Page Mode for a sustained data rate
of 43 MHz
s RAS access time: 40, 50 ns
s Dual CAS Inputs
s Low power dissipation
s Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh, and Self Refresh
s Refresh Interval: 512 cycles/8 ms
s Available in 40-pin 400 mil SOJ and
40/44L-pin 400 mil TSOP-II packages
s Single 5.0V ±10% Power Supply
s TTL Interface
s Self Refresh: 512 cycles/8ms
40
40 ns
20 ns
23 ns
75 ns
50
50 ns
24 ns
28 ns
90 ns
Description
The V53C16256SH is a 262,144 x 16 bit high-
performance CMOS dynamic random access mem-
ory. The V53C16256SH offers Fast Page mode
with dual CAS inputs. An address, CAS and RAS in-
put capacitances are reduced to one quarter when
the x4 DRAM is used to construct the same memory
density. The V53C16256SH has symmetric ad-
dress and accepts 512 cycle 8ms interval.
All inputs are TTL compatible. Fast Page Mode
operation allows random access up to 512 x 16 bits,
within a page, with cycle times as short as 23ns.
The V53C16256SH is best suited for graphics,
and DSP applications.
Device Usage Chart
Operating
Temperature
Range
0°C to 70°C
Package Outline
KT
••
V53C16256SH Rev. 0.1 December 1998
Access Time (ns)
40 50
••
1
Power
Std.
•
Temperature
Mark
Blank
1 page  
MOSEL VITELIC
AC Characteristics
TA = 0°C to 70°C, VCC = 5V ±10%, VSS = 0V unless otherwise noted
AC Test conditions, input pulse levels 0 to 3V
# Symbol Parameter
1 tRAS
RAS Pulse Width
2 tRC
Read or Write Cycle Time
3 tRP
RAS Precharge Time
4 tCSH
CAS Hold Time
5 tCAS
CAS Pulse Width
6 tRCD
RAS to CAS Delay
7 tRCS
Read Command Setup Time
8 tASR
Row Address Setup Time
9 tRAH
Row Address Hold Time
10 tASC
Column Address Setup Time
11 tCAH
Column Address Hold Time
12 tRSH (R) RAS Hold Time (Read Cycle)
13 tCRP
CAS to RAS Precharge Time
14 tRCH
Read Command Hold Time Referenced to CAS
15 tRRH
Read Command Hold Time Referenced to RAS
16 tROH
RAS Hold Time Referenced to OE
17 tOAC
Access Time from OE
18 tCAC
Access Time from CAS
19 tRAC
Access Time from RAS
20 tCAA
Access Time from Column
Address
21 tLZ
OE or CAS to Low-Z Output
22 tHZ
OE or CAS to High-Z Output
23 tAR
Column Address Hold Time from RAS
24 tRAD
RAS to Column Address Delay Time
25 tRSH (W) RAS or CAS Hold Time in Write Cycle
26 tCWL
Write Command to CAS Lead Time
27 tWCS
Write Command Setup Time
28 tWCH Write Command Hold Time
29 tWP
Write Pulse Width
30 tWCR Write Command Hold Time from RAS
31 tRWL
Write Command to RAS Lead Time
32 tDS
Data in Setup Time
V53C16256SH
40 50
Min. Max. Min. Max. Unit Notes
40 75 50 75K ns
75 90 ns
25 30 ns
40 50 ns
12 14 ns
17 28 19 36 ns
0 0 ns 4
0 0 ns
7 9 ns
0 0 ns
5 7 ns
12 14 ns
5 5 ns
0 0 ns 5
0 0 ns 5
8 10 ns
12 14 ns
12 14 ns 6, 7
45 55 ns 6, 8, 9
20 24 ns 6, 7, 10
0 0 ns 16
0 6 0 8 ns 16
30 40 ns
12 20 14 26 ns 11
12 14 ns
12 14 ns
0 0 ns 12, 13
5 7 ns
5 7 ns
30 40 ns
12 14 ns
0 0 ns 14
V53C16256SH Rev. 0.1 December 1998
5
5 Page 
MOSEL VITELIC
V53C16256SH
Waveforms of Fast Page Mode Read Cycle
RAS VIH
V IL
CAS VIH
V IL
ADDRESS VIH
V IL
WE VIH
V IL
OE VIH
V IL
VOH
I/O
VOL
tAR (23)
t RAS (1)
t RP (3)
t RCD (6)
tCRP (13)
tPC (42)
tCP(43)
tCAS (5)
tRSH (R)(12)
tCAS (5)
tCRP (13)
tCAS (5)
tASR (8)
tRAH (9)
tASC (10)
tCSH (4)
tASC (10)
t CAH (11)
ROW
ADDRESS
tRCS (7)
COLUMN
ADDRESS
COLUMN
ADDRESS
tRCH (14)
tCAH (11)
tRCS (7)
tCAR (44)
t CAH (11)
COLUMN
ADDRESS
tRCS (7)
tRCH (14)
tCAA (20)
tOAC (17)
t CAP (45)
t OAC (17)
tCAA (20)
tOAC (17)
tRRH (15)
tRAC (19)
tCAC (18)
t LZ (21)
tHZ (22)
CACt (18)
tHZ (22)
tLZ (21)
VALID
DATA OUT
t CAC (18)
tLZ (21)
tHZ (22)
tHZ (22)
VALID
DATA OUT
tHZ (22)
tHZ (22)
VALID
DATA OUT
16256L-09
Waveforms of Fast Page Mode Write Cycle
RAS VIH
V IL
UCAS, LCAS VIH
V IL
VIH
ADDRESS
V IL
WE VIH
V IL
OE VIH
VIL
VIH
I/O
V IL
tAR (23)
t RAS (1)
tRP (3)
t CRP (13)
tRCD (6)
tPC (42)
tCP(43)
t CAS (5)
tCAS (5)
tRSH (W)(25)
tCAS (5)
tRAH (9)
tASR (8)
tCSH (4)
tASC (10)
tCAH (11)
ROW
ADD
tRAD (24)
tWCS (27)
COLUMN
ADDRESS
t CWL (26)
tWCS (27)
t WCH (28)
t WP (29)
tASC (10)
tCAH (11)
COLUMN
ADDRESS
tCWL (26)
t WCS (27)
tWCH (28)
t WP(29)
tCAR (44)
t CAH (11)
COLUMN
ADDRESS
tCWL (26)
tRWL(31)
tWCH (28)
tWP(29)
tDS (32)
VALID
DATA IN
tDS (32)
tDH (33)
OPEN
VALID
DATA IN
tDS (32)
tDH (33)
VALID
DATA IN
tDH (33)
OPEN
tCRP (13)
16256L-10
V53C16256SH Rev. 0.1 December 1998
11
Don’t Care
Undefined
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet V53C16256SH.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| V53C16256SH | 256K X 16 FAST PAGE MODE CMOS DYNAMIC RAM WITH SELF REFRESH | Mosel Vitelic Corp |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |