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PDF V53C16126H Data sheet ( Hoja de datos )

Número de pieza V53C16126H
Descripción HIGH PERFORMANCE 128K X 16 BIT FAST PAGE MODE CMOS DYNAMIC RAM
Fabricantes Mosel Vitelic Corp 
Logotipo Mosel Vitelic  Corp Logotipo



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No Preview Available ! V53C16126H Hoja de datos, Descripción, Manual

MOSEL VITELIC
V53C16126H
HIGH PERFORMANCE
128K X 16 BIT FAST PAGE MODE
CMOS DYNAMIC RAM
HIGH PERFORMANCE
Max. RAS Access Time, (tRAC)
Max. Column Address Access Time, (tCAA)
Min. Fast Page Mode Cycle Time, (tPC)
Min. Read/Write Cycle Time, (tRC)
30
30 ns
16 ns
19 ns
65 ns
35
35 ns
18 ns
21 ns
70 ns
40
40 ns
20 ns
23 ns
75 ns
45
45 ns
22 ns
25 ns
80 ns
50
50 ns
24 ns
28 ns
90 ns
Features
s 128K x 16-bit organization
s Fast Page Mode for a sustained data rate
of 53 MHz
s RAS access time: 30, 35, 40, 45, 50ns
s Dual CAS Inputs
s Low Power Dissipation
s Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh
s Refresh Interval: 512 cycles/8 ms
s Available in 40-pin 400 mil SOJ and 40/44L-pin
400 mil TSOP-II packages
s Single +5V±10% Power Supply
s TTL Interface
Description
The V53C16126H is a 131,072 x 16 bit high
performance CMOS dynamic random access
memory. The V53C16126H offers Fast Page mode
with dual CAS inputs. The V53C16126H has
asymmetric address, 9-bit row and 8-bit column.
All inputs are TTL compatible. Fast Page Mode
operation allows random access up to 256 x 16
bits, within a page, with cycle times as short as
19ns.
The V53C16126H is ideally suited for a wide
variety of high performance computer systems and
peripheral applications.
Device Usage Chart
Operating
Temperature
Range
0°C to 70°C
Package Outline
Access Time (ns)
K T 30 35 40 45 50
• • •••••
Power
Std.
Temperature
Mark
Blank
V53C16126H Rev. 1.3 February 1998
1

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V53C16126H pdf
MOSEL VITELIC
V53C16126H
AC Characteristics
TA = 0°C to 70°C, VCC = 5 V ±10%, VSS = 0V unless otherwise noted
AC Test conditions, input pulse levels 0 to 3V
30 35 40 45 50
# Symbol Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit Notes
1 tRAS
2 tRC
3 tRP
4 tCSH
5 tCAS
6 tRCD
7 tRCS
8 tASR
9 tRAH
10 tASC
11 tCAH
12 tRSH (R)
13 tCRP
14 tRCH
RAS Pulse Width
Read or Write Cycle Time
RAS Precharge Time
CAS Hold Time
CAS Pulse Width
RAS to CAS Delay
Read Command Setup Time
Row Address Setup Time
Row Address Hold Time
Column Address Setup Time
Column Address Hold Time
RAS Hold Time (Read Cycle)
CAS to RAS Precharge Time
Read Command Hold Time
Referenced to CAS
30 75K 35 75K 40 75K 45 75K 50 75K ns
65 70 75 80 90 ns
25 25 25 25 30 ns
30 35 40 45 50 ns
5 6 7 8 9 ns
15 20 16 24 17 28 18 32 19 36 ns
0 0 0 0 0 ns
0 0 0 0 0 ns
5 6 7 8 9 ns
0 0 0 0 0 ns
5 5 5 6 7 ns
10 10 10 10 10 ns
5 5 5 5 5 ns
0 0 0 0 0 ns
4
5
15 tRRH
Read Command Hold Time
0
0
0
0
0 ns 5
Referenced to RAS
16 tROH
RAS Hold Time
Referenced to OE
6 7 8 9 10 ns
17 tOAC
18 tCAC
19 tRAC
20 tCAA
Access Time from OE
Access Time from CAS
Access Time from RAS
Access Time from Column
Address
10 11 12 13 14 ns 12
10 11 12 13 14 ns 6,7,14
30 35 40 45 50 ns 6, 8, 9
16 18 20 22 24 ns 6,7,10
21 tLZ
22 tHZ
23 tAR
OE or CAS to Low-Z Output
0
0
0
0
0 ns 16
OE or CAS to High-Z Output
0 5 0 6 0 6 0 7 0 8 ns 16
Column Address Hold Time from 26 28 30 35 40 ns
RAS
24 tRAD
RAS to Column Address
Delay Time
10 14 11 17 12 20 13 23 14 26 ns 11
25 tRSH (W) RAS or CAS Hold Time in
10
10
10
10
10
ns
Write Cycle
26 tCWL
Write Command to CAS
10
11
12
13
14
ns
Lead Time
27 tWCS
Write Command Setup Time
0
0
0
0
0 ns 12, 13
28 tWCH
Write Command Hold Time
5
5
5
6
7 ns
V53C16126H Rev. 1.3 February 1998
5

5 Page





V53C16126H arduino
MOSEL VITELIC
V53C16126H
Waveforms of Fast Page Mode Read Cycle
V IH
RAS
V IL
V IH
UCAS, LCAS
V IL
ADDRESS V IH
V IL
t ASR (8)
V IH
WE
V IL
V IH
OE
V IL
V OH
I/O
V OL
t AR (23)
tRASP (37)
t RP (3)
t RCD (6)
t CRP (13)
t PC (42)
t CP (43)
t CAS (5)
t RSH (R)(12)
tCAS (5)
t CRP (13)
t CAS (5)
t RAH (9)
tASC (10)
t CSH (4)
tASC (10)
t CAH (11)
ROW
ADDRESS
t RCS (7)
COLUMN
ADDRESS
COLUMN
ADDRESS
t RCH (14)
t CAH (11)
t RCS (7)
tCAR (44)
t CAH (11)
COLUMN
ADDRESS
t RCS (7)
t RCH (14)
t CAA (20)
t OAC (17)
t CAP (45)
t OAC (17)
tCAA (20)
t OAC (17)
t RRH (15)
t RAC (19)
t CAC (18)
t LZ (21)
t HZ (22)
t CAC (18)
tHZ (22)
t LZ (21)
VALID
DATA OUT
t CAC (18)
t LZ (21)
t HZ (22)
t HZ (22)
VALID
DATA OUT
VALID
DATA OUT
t HZ (22)
t HZ (22)
16126H-09
Waveforms of Fast Page Mode Write Cycle
V IH
RAS
V IL
V IH
UCAS, LCAS
V IL
V IH
ADDRESS
V IL
t AR (23)
t CRP (13)
t RCD (6)
t PC (42)
t CP (43)
t CAS (5)
t RAH (9)
t ASR (8)
t CSH (4)
t ASC (10)
t CAH (11)
ROW
ADD
t RAD (24)
t WCS (27)
COLUMN
ADDRESS
t CWL (26)
t WCS (27)
t WCH (28)
V IH
WE
V IL
t WP (29)
t RASP (37)
t CAS (5)
t ASC (10)
t CAH (11)
COLUMN
ADDRESS
t CWL (26)
t WCS (27)
t WCH (28)
t WP (29)
t RP (3)
t RSH (W)(25)
t CAS (5)
t CAR (44)
t CAH (11)
COLUMN
ADDRESS
t CWL (26)
t RWL (31)
tWCH (28)
tWP (29)
t CRP (13)
VIH
OE
VIL
V IH
I/O
V IL
t DS (32)
VALID
DATA IN
t DS (32)
t DH (33)
OPEN
VALID
DATA IN
t DS (32)
t DH (33)
VALID
DATA IN
t DH (33)
OPEN
16126H-10
V53C16126H Rev. 1.3 February 1998
11
Don’t Care
Undefined

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