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PDF VSP2080 Data sheet ( Hoja de datos )
| Número de pieza | VSP2080 | |
| Descripción | CCD SIGNAL FRONT-END PROCESSOR FOR DIGITAL CAMERAS | |
| Fabricantes | Burr-Brown Corporation | |
| Logotipo |  |
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®
VSP2080 ®
VSP2080
TM CCD SIGNAL FRONT-END
PROCESSOR FOR DIGITAL CAMERAS
FEATURES
q CCD SIGNAL PROCESSING
Correlated Double Sampling
Black Level Clamping
0 to +34dB Gain Range
55dB SNR Referred to Full Scale
q SELECTABLE LOGIC-INPUT POLARITY
Positive Active or Negative Active
q PORTABLE OPERATION
Low Voltage: 2.7V to 3.6V
Low Power: 144mW at 3.0V
Power-Down Mode: 10mW
APPLICATIONS
q VIDEO CAMERAS
q DIGITAL STILL CAMERAS
q PC CAMERAS
q SECURITY CAMERAS
REFCK DATCK
DESCRIPTION
The VSP2080 is a complete front-end processing IC
for digital cameras. The VSP2080 provides signal
conditioning for the output of a CCD array. The
VSP2080 provides correlated double sampling to ex-
tract the video information from the pixels, 0dB to
+34dB gain range with analog control for varying
illumination conditions, and black level clamping for
an accurate black reference. The stable gain control is
linear in dB. Additionally, the black level quickly
recovers after screen changes. The MODE pin allows
the selection of logic-input polarity. The VSP2080 is
available in a 20-lead TSSOP package.
MODE
AGC IN
C
OB
CCD
OUT
CCD D
Clamp
Correlated
Double
Sampling
Logic Input
Polarity
Control
+6dB
Log
VCA
Optical
Black Level
Auto-Zero
+28dB
OUT
CCD R
Dummy
Pixel
Auto-Zero
Internal
Bias
Generator
DUMC
REFT REFB REF IN
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1998 Burr-Brown Corporation
PDS-1498B
Printed in U.S.A. August, 1999
1 page  
THEORY OF OPERATION
The VSP2080 contains all of the key features associated with
the processing of analog signals in a CCD video camera or
digital still camera. Figure 1 shows a simplified block
diagram of the VSP2080. The output from the CCD array is
first clamped to an internal reference of +1V. This sets the
proper signal range for the input of the Correlated Double
Sampler (CDS). The CDS operates at at gain of 2 and
provides a differential output. Its output drives a voltage-
controlled attenuator with a logarithmic control characteris-
tic. An output amplifier drives this signal to external cir-
cuitry and sets the proper black level for the ADS900 A/D
converter.
CORRELATED DOUBLE SAMPLER (CDS)
The CDS removes low frequency noise from the output of
the image sensor. Refer to Figure 2 which shows a block
diagram of the CDS. The output from the CCD array is
sampled during the reference interval as well as during the
data interval. Noise that is present at the input and is of a
period greater than the pixel interval will be eliminated by
subtraction.
The VSP2080 employs a three track-and-hold correlated
double sampler architecture. Track/Hold 2 samples the CCD
noise during the reference interval as driven by the REFCK
signal. Track/Hold 3 resamples this level at the same time
that Track/Hold 1 samples the video information as driven
by the DATCK signal. This is done to remove large tran-
sients from Track/Hold 2 that result from a portion of the
reset transient being present during the acquisition time of
this track-and-hold. The output of Track/Hold 2 is buffered
by a voltage follower.
DUMC
Dummy
Feedback
Loop
OB
CCD
OUT
CCD D
CEXT
CDS
Clamp
VCA
REFCK DATCK
Gain Control
FIGURE 1. Simplified Block Diagram of VSP2080.
Black Level
Auto-Zero
Loop
Output
Amplifier
Analog
Output
CCD
OUT
CCD D
CEXT
Data Sampling Channel T/H1
Reference Sampling
Channel
T/H2
T/H3
To VCA
1V
DUMC REFCK
DATCK
FIGURE 2. Simplified Block Diagram of Correlated Double Sampler.
5
VSP2080
®
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet VSP2080.PDF ] | |
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