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PDF VS1001K Data sheet ( Hoja de datos )

Número de pieza VS1001K
Descripción MPEG AUDIO CODEC
Fabricantes ETC 
Logotipo ETC Logotipo



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DATASHEET
VS1001K
VS1001k - MPEG AUDIO CODEC
Features
MPEG audio layer 3 decoder (ISO11172-3)
Supports MPEG 1 & 2, and 2.5 extensions,
all their sample rates and bit rates, in mono
and stereo
Supports PCM input
Supports VBR (variable bitrate)
Can be used as a slave co-processor
Operates with single clock 12..13 MHz or
24..26 MHz
Extremely low-power operation
On-chip high-quality stereo DAC with no
phase error between channels
Internal Op-Amp in BGA-49 and LQFP-48
packages
Stereo earphone driver capable of driving a
30load.
Separate 2.5 .. 3.6V operating voltages for
analog and digital
4 KiB On-chip RAM for user code
Serial control and data interfaces
New functions may be added with software
Description
VS1001k is a single-chip solution for an MPEG
layer 3 audio decoder. The chip contains a high-
performance low-power DSP processor (VS DSP),
working memory, 4 KiB program RAM and 0.5
KiB data RAM for user applications, serial con-
trol and input data interfaces, and a high-quality
oversampling variable-sample-rate stereo DAC, fol-
lowed by an earphone amplifier and a ground buffer.
VS1001k receives its input bitstream through a
serial input bus, which it listens to as a system
slave. The input stream is decoded and passed
through a analog/digital hybrid volume control to
an 18-bit oversampling multi-bit sigma-delta DAC.
The decoding is controlled via a serial control bus.
In addition to the basic decoding, it is possible to
add application specific features, like DSP effects,
to the user RAM memory.
DREQ
DCLK
SDATA
BSYNC
SO
SI
SCLK
XCS
VS1001
serial
data
interface
serial
control
interface
stereo
DAC
stereo ear−
phone driver
audio
L
R
output
SDI
Bus X Bus
VS_DSP
SCI
Bus Y Bus
I Bus
x−ROM
x−RAM
y−RAM
y−ROM
program program
RAM
ROM
Version 4.11, 2003-09-18
1

1 page




VS1001K pdf
VLSI
Solution y
DATASHEET
VS1001K
CONTENTS
9.5 System Vector Tags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.5.1 AudioInt, 0x4000..0x4001 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.5.2 SpiInt, 0x4002..0x4003 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.5.3 DataInt, 0x4004..0x4005 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.5.4 UserCodec, 0x4008..0x4009 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.6 System Vector Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.6.1 WriteIRam(), 0x4010 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.6.2 ReadIRam(), 0x4011 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.6.3 DataWords(), 0x4012 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
9.6.4 GetDataByte(), 0x4013 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
9.6.5 GetDataWords(), 0x4014 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
10 VS1001 Version Changes
37
10.1 Changes Between VS1001h and Production Version VS1001k, 2001-08 . . . . . . . . . 37
10.2 Changes Between VS1001g and VS1001h, 2001-05 . . . . . . . . . . . . . . . . . . . . 37
10.3 Changes Between VS1001d to VS1001g, 2001-03 . . . . . . . . . . . . . . . . . . . . . 37
11 Document Version Changes
38
11.1 Changes Between Version 4.10 and 4.11 for VS1001k, 2003-09 . . . . . . . . . . . . . 38
11.2 Changes Between Version 4.08 and 4.10 for VS1001k, 2003-07 . . . . . . . . . . . . . 38
11.3 Changes Between Version 4.07 and 4.08 for VS1001k, 2003-03 . . . . . . . . . . . . . 38
11.4 Changes Between Version 4.06 and 4.07 for VS1001k, 2003-03 . . . . . . . . . . . . . 38
11.5 Changes Between Version 4.05 and 4.06 for VS1001k, 2002-09 . . . . . . . . . . . . . 38
11.6 Changes Between Version 4.03 and 4.05 for VS1001k, 2002-08 . . . . . . . . . . . . . 38
12 Contact Information
39
Version 4.11, 2003-09-18
5

5 Page





VS1001K arduino
VLSI
Solution y
VS1001K
DATASHEET
3. PACKAGES AND PIN DESCRIPTIONS
3 Packages and Pin Descriptions
3.1 SOIC-28
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VS1001 SOIC − 28
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Figure 1: Pin Configuration, SOIC-28.
Pin Name
DREQ
DCLK
SDATA
BSYNC
DVDD1
DGND1
XTALO
XTALI
DVDD2
DGND2
XCS
SCLK
SI
SO
TEST0
TEST1
TEST2
AGND1
AVDD1
RIGHT
AGND2
RCAP
AVDD2
LEFT
AGND3
XRESET
DGND3
DVDD3
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Pin Type
DO
DIO
DI
DI
PWR
PWR
CLK
CLK
PWR
PWR
DI
DI
DI
DO3
DI
DO
DO
PWR
PWR
AO
PWR
AIO
PWR
AO
PWR
DI
PWR
PWR
Function
data request, input bus
serial input data bus clock
serial data input
byte synchronization signal
digital power supply
digital ground
crystal output
crystal input
digital power supply
digital ground
chip select input (active low)
clock for serial bus
serial input
serial output
reserved for test, connect to DVDD
reserved for test, do not connect!
reserved for test, do not connect!
analog ground
analog power supply
right channel output
analog ground
capacitance for reference
analog power supply
left channel output
analog ground
active low asynchronous reset
digital ground
digital power supply
Pin types:
Type Description
DI Digital input, CMOS Input Pad
DO Digital output, CMOS Input Pad
DIO Digital input/output
DO3 Digital output, CMOS Tri-stated Output Pad
Type
AI
AO
AIO
PWR
Description
Analog input
Analog output
Analog input/output
Power supply pin
SOIC-28 package dimensions can be found at http://www.vlsi.fi/vs1001/soic28.pdf .
Version 4.11, 2003-09-18
11

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