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PDF X5165S8-2.7 Data sheet ( Hoja de datos )

Número de pieza X5165S8-2.7
Descripción CPU Supervisor with 16Kbit SPI EEPROM
Fabricantes Xicor 
Logotipo Xicor Logotipo



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No Preview Available ! X5165S8-2.7 Hoja de datos, Descripción, Manual

Preliminary Information
Replaces X25163/X25165
X5163/X5165
CPU Supervisor with 16Kbit SPI EEPROM
FEATURES
• Selectable watchdog timer
• Low VCC detection and reset assertion
—Five standard reset threshold voltages
—Re-program low VCC reset threshold voltage
using special programming sequence
—Reset signal valid to VCC = 1V
• Determine watchdog or low voltage reset with a
volatile flag bit
• Long battery life with low power consumption
—<50µA max standby current, watchdog on
—<1µA max standby current, watchdog off
—<400µA max active current during read
• 16Kbits of EEPROM
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Protect 0, 1/4, 1/2 or all of EEPROM array with
Block Lockprotection
—In circuit programmable ROM mode
• 2MHz SPI interface modes (0,0 & 1,1)
• Minimize EEPROM programming time
—32-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• 2.7V to 5.5V and 4.5V to 5.5V power supply
operation
• Available packages
—14-lead TSSOP, 8-lead SOIC
BLOCK DIAGRAM
DESCRIPTION
These devices combine four popular functions, Power-
on Reset Control, Watchdog Timer, Supply Voltage
Supervision, and Block Lock Protect Serial EEPROM
Memory in one package. This combination lowers
system cost, reduces board space requirements, and
increases reliability.
Applying power to the device activates the power on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcon-
troller fails to restart a timer within a selectable time out
interval, the device activates the RESET/RESET signal.
The user selects the interval from three preset values.
Once selected, the interval does not change, even
after cycling the power.
The device’s low VCC detection circuitry protects the
user’s system from low voltage conditions, resetting the
system when VCC falls below the minimum VCC trip point.
RESET/RESET is asserted until VCC returns to proper
operating level and stabilizes. Five industry standard
VTRIP thresholds are available, however, Xicor’s unique
circuits allow the threshold to be reprogrammed to meet
custom requirements or to fine-tune the threshold for
applications requiring higher precision.
WP
SI
SO
SCK
CS/WDI
VCC
Watchdog Transition
Detector
Protect Logic
Data
Register
Command
Decode &
Control
Logic
VCC Threshold
Reset Logic
Status
Register
4K Bits
4K Bits
8K Bits
VTRIP
+
-
Watchdog
Timer Reset
Reset &
Watchdog
Timebase
Power on and
Low Voltage
Reset
Generation
RESET/RESET
X5163 = RESET
X5165 = RESET
REV 1.1 3/5/01
www.xicor.com
Characteristics subject to change without notice. 1 of 21

1 page




X5165S8-2.7 pdf
X5163/X5165 – Preliminary Information
Figure 4. Sample VTRIP Reset Circuit
VTRIP
Adj.
Program
4.7K
+
NC
18
27
3 X5163/65 6
45
NC 4.7K
RESET
NC
VP
10K 10K
Reset VTRIP
Test VTRIP
Set VTRIP
SPI SERIAL MEMORY
The memory portion of the device is a CMOS Serial
EEPROM array with Xicor’s block lock protection. The
array is internally organized as x 8. The device features
a Serial Peripheral Interface (SPI) and software proto-
col allowing operation on a simple four-wire bus.
The device utilizes Xicor’s proprietary Direct Write
cell, providing a minimum endurance of 100,000 cycles
and a minimum data retention of 100 years.
The device is designed to interface directly with the
synchronous Serial Peripheral Interface (SPI) of many
popular microcontroller families. It contains an 8-bit
instruction register that is accessed via the SI input,
with data being clocked in on the rising edge of SCK.
CS must be LOW during the entire operation.
All instructions (Table 1), addresses and data are
transferred MSB first. Data input on the SI line is
latched on the first rising edge of SCK after CS goes
LOW. Data is output on the SO line by the falling edge
of SCK. SCK is static, allowing the user to stop the
clock and then start it again to resume operations
where left off.
Write Enable Latch
The device contains a Write Enable Latch. This latch
must be SET before a Write Operation is initiated. The
WREN instruction will set the latch and the WRDI
instruction will reset the latch (Figure 3). This latch is
automatically reset upon a power-up condition and
after the completion of a valid Write Cycle.
Status Register
The RDSR instruction provides access to the Status
Register. The Status Register may be read at any time,
even during a Write Cycle. The Status Register is for-
matted as follows:
7 6 5 4 32 1 0
WPEN FLB WD1 WD0 BL1 BL0 WEL WIP
The Write-In-Progress (WIP) bit is a volatile, read only
bit and indicates whether the device is busy with an
internal nonvolatile write operation. The WIP bit is read
using the RDSR instruction. When set to a “1”, a non-
volatile write operation is in progress. When set to a
“0”, no write is in progress.
REV 1.1 3/5/01
www.xicor.com
Characteristics subject to change without notice. 5 of 21

5 Page





X5165S8-2.7 arduino
X5163/X5165 – Preliminary Information
ABSOLUTE MAXIMUM RATINGS
Temperature under bias ........................–65 to +135°C
Storage temperature .............................–65 to +150°C
Voltage on any pin with
respect to VSS ......................................–1.0V to +7V
D.C. output current ............................................... 5mA
Lead temperature (soldering, 10 seconds)........ 300°C
RECOMMENDED OPERATING CONDITIONS
Temperature
Commercial
Industrial
Min.
0°C
–40°C
Max.
70°C
+85°C
COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only; the functional operation of the
device (at these or any other conditions above those
listed in the operational sections of this specification) is
not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
Device Option
–2.7 or -2.7A
Blank or -4.5A
Supply Voltage
2.7V to 5.5V
4.5V-5.5V
D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)
Symbol
ICC1
ICC2
ISB1
ISB2
ISB3
ILI
ILO
VIL(1)
VIH(1)
VOL1
VOL2
VOL3
VOH1
VOH2
VOH3
VOLS
Parameter
VCC Write Current (Active)
VCC Read Current (Active)
VCC Standby Current
WDT = OFF
VCC Standby Current
WDT = ON
VCC Standby Current
WDT = ON
Input Leakage Current
Output Leakage Current
Input LOW Voltage
Input HIGH Voltage
Output LOW Voltage
Output LOW Voltage
Output LOW Voltage
Output HIGH Voltage
Output HIGH Voltage
Output HIGH Voltage
Reset Output LOW Voltage
Min.
Limits
Typ.
Max.
5
0.4
1
50
20
0.1 10
0.1 10
–0.5
VCC x 0.7
VCC x 0.3
VCC + 0.5
0.4
0.4
0.4
VCC – 0.8
VCC – 0.4
VCC – 0.2
0.4
Unit
mA
mA
µA
µA
µA
µA
µA
V
V
V
V
V
V
V
V
V
Test Conditions
SCK = VCC x 0.1/VCC x 0.9 @ 2MHz,
SO = Open
SCK = VCC x 0.1/VCC x 0.9 @ 2MHz,
SO = Open
CS = VCC, VIN = VSS or VCC,
VCC = 5.5V
CS = VCC, VIN = VSS or VCC,
VCC = 5.5V
CS = VCC, VIN = VSS or VCC,
VCC = 3.6V
VIN = VSS to VCC
VOUT = VSS to VCC
VCC > 3.3V, IOL = 2.1mA
2V < VCC 3.3V, IOL = 1mA
VCC 2V, IOL = 0.5mA
VCC > 3.3V, IOH = –1.0mA
2V < VCC 3.3V, IOH = –0.4mA
VCC 2V, IOH = –0.25mA
IOL = 1mA
REV 1.1 3/5/01
www.xicor.com
Characteristics subject to change without notice. 11 of 21

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