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PDF X24640PI-1.8 Data sheet ( Hoja de datos )

Número de pieza X24640PI-1.8
Descripción 400KHz 2-Wire Serial E 2 PROM with Block Lock
Fabricantes Xicor 
Logotipo Xicor Logotipo



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No Preview Available ! X24640PI-1.8 Hoja de datos, Descripción, Manual

64K
X24640
8K x 8 Bit
400KHz 2-Wire Serial E2PROM with Block LockTM
FEATURES
Save Critical Data with Programmable
Block Lock Protection
—Block Lock (0, 1/4, 1/2, or all of E2PROM Array)
—Software Program Protection
—Programmable Hardware Write Protect
In Circuit Programmable ROM Mode
400KHz 2-Wire Serial Interfac
—Schmitt Trigger Input Noise Suppression
—Output Slope Control for Ground Bounce
Noise Elimination
Longer Battery Life With Lower Power
—Active Read Current Less Than 1mA
—Active Program Current Less Than 3mA
—Standby Current Less Than 1µA
1.8V to 3.6V, 2.5V to 5.5V and 4.5V to 5.5V
Power Supply Versions
32 Word Page Write Mode
—Minimizes Total Write Time Per Word
Internally Organized 8K x 8
Bidirectional Data Transfer Protocol
Self-Timed Write Cycle
—Typical Write Cycle Time of 5ms
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
8-Lead SOIC
20-Lead TSSOP
8-Lead PDIP
FUNCTIONAL DIAGRAM
DESCRIPTION
The X24640 is a CMOS Serial E2PROM, internally
organized 8K x 8. The device features a serial inter-
face and software protocol allowing operation on a
simple two wire bus. The bus operates at 400 KHz all
the way down to 1.8V.
Three device select inputs (S0–S2) allow up to eight
devices to share a common two wire bus.
A Write Protect Register at the highest address loca-
tion, FFFFh, provides three write protection features:
Software Write Protect, Block Lock Protect, and
Programmable Hardware Write Protect. The Software
Write Protect feature prevents any nonvolatile writes to
the device until the WEL bit in the Write Protect
Register is set. The Block Lock Protection feature
gives the user four array block protect options, set by
programming two bits in the Write Protect Register.
The Programmable Hardware Write Protect feature
allows the user to install the device with WP tied to
VCC, program and Block Lock the desired portions of
the memory array in circuit, and then enable the In
Circuit Programmable ROM Mode by programming the
WPEN bit in the Write Protect Register. After this, the
Block Locked portions of the array, including the Write
Protect Register itself, are permanently protected from
being erased.
SERIAL E2PROM DATA
AND ADDRESS (SDA)
DATA REGISTER
Y DECODE LOGIC
SCL
S2
S1
S0
COMMAND
DECODE
AND
CONTROL
LOGIC
BLOCK LOCK AND
WRITE PROTECT
CONTROL LOGIC
PAGE
DECODE
LOGIC
DEVICE
SELECT
LOGIC
WRITE
PROTECT
REGISTER
SERIAL E2PROM
ARRAY
8K x 8
2K x 8
2K x 8
4K x 8
WP
©Xicor, 1995, 1996 Patents Pending
7038-1.2 4/25/97 T0/C2/D0 SH
WRITE VOLTAGE
CONTROL
7038 FM 01
Characteristics subject to change without notice
1

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X24640PI-1.8 pdf
X24640
DEVICE ADDRESSING
Following a start condition, the master must output the
address of the slave it is accessing. The first four bits
of the Slave Address Byte are the device type identifier
bits. These must equal “1010”. The next 3 bits are the
device select bits S0, S1, and S2. This allows up to 8
devices to share a single bus. These bits are
compared to the S0, S1, and S2 device select input
pins. The last bit of the Slave Address Byte defines the
operation to be performed. When the R/W bit is a one,
then a read operation is selected. When it is zero then
a write operation is selected. Refer to figure 4. After
loading the Slave Address Byte from the SDA bus, the
device compares the device type bits with the value
“1010” and the device select bits with the status of the
device select input pins. If the compare is not successful,
no acknowledge is output during the ninth clock cycle
and the device returns to the standby mode.
The word address is either supplied by the master or
obtained from an internal counter, depending on the
operation. The master must supply the two Word
Address Bytes as shown in figure 4.
The internal organization of the E2 array is 256 pages by
32 bytes per page. The page address is partially
contained in the Word Address Byte 1 and partially in
bits 7 through 5 of the Word Address Byte 0. The byte
address is contained in bits 4 through 0 of the Word
Address Byte 0. See figure 4.
Figure 4. Device Addressing
DEVICE TYPE
IDENTIFIER
DEVICE
SELECT
1 0 1 0 S 2 S1 S0 R/ W
SLAVE ADDRESS BYTE
HIGH ORDER WORD ADDRESS
0 0 0 A12 A11 A10 A9 A8
X24640 WORD ADDRESS BYTE 1
LOW ORDER WORD ADDRESS
A7 A6 A5 A4 A3 A2 A1 A0
WORD ADDRESS BYTE 0
D7 D6 D5 D4 D3 D2 D1 D0
DATA BYTE
7038 FM 06
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X24640PI-1.8 arduino
X24640
ABSOLUTE MAXIMUM RATINGS*
Temperature under Bias
X24640.......................................–65°C to +135°C
Storage Temperature ........................–65°C to +150°C
Voltage on any Pin with
Respect to VSS.................................... –1V to +7V
D.C. Output Current ..............................................5mA
Lead Temperature
(Soldering, 10 seconds) .............................. 300°C
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and the functional operation
of the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Temperature
Commercial
Industrial
Min.
0°C
–40°C
D.C. OPERATING CHARACTERISTICS
Max.
+70°C
+85°C
7038 FRM T04
Supply Voltage
X24640
X24640–2.5
X24640–1.8
Limits
4.5V to 5.5V
2.5V to 5.5V
1.8V to 3.6V
7038 FRM T05
Limits
Symbol
Parameter
Min.
Max. Units
Test Conditions
ICC1
ICC2
ISB1(1)
ISB2(1)
ILI
ILO
VlL(2)
VIH(2)
VOL
Vhys(3)
VCC Supply Current (Read)
VCC Supply Current (Write)
VCC Standby Current
VCC Standby Current
Input Leakage Current
Output Leakage Current
Input LOW Voltage
Input HIGH Voltage
Output LOW Voltage
Hysteresis of Schmitt
Trigger Inputs
–0.5
VCC x 0.7
VCC x 0.05
1
3
5
1
10
10
VCC x 0.3
VCC + 0.5
0.4
mA SCL = VCC X 0.1/VCC X 0.9 Levels
mA
@ 400KHz, SDA = Open, All Other
Inputs = VSS or VCC – 0.3V
µA SCL = SDA = VCC, All Other
Inputs = VSS or VCC – 0.3V,
VCC = 5V ± 10%
µA SCL = SDA = VCC, All Other
Inputs = VSS or VCC – 0.3V,
VCC = 2.5V
µA VIN = VSS to VCC
µA VOUT = VSS to VCC
V
V
V IOL = 3mA
V
CAPACITANCE TA = +25°C, f = 1MHz, VCC = 5V
7038 FRM T06
Symbol
Parameter
Max.
Units
Test Conditions
CI/O(3)
CIN(3)
Input/Output Capacitance (SDA)
Input Capacitance (S0, S1, S2, SCL, WP)
8 pF
6 pF
VI/O = 0V
VIN = 0V
Notes: (1) Must perform a stop command prior to measurement.
(2) VIL min. and VIH max. are for reference only and are not 100% tested.
(3) This parameter is periodically sampled and not 100% tested.
7038 FRM T07
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