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PDF X24001MM-2.7 Data sheet ( Hoja de datos )

Número de pieza X24001MM-2.7
Descripción IdentiPROM
Fabricantes Xicor 
Logotipo Xicor Logotipo



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No Preview Available ! X24001MM-2.7 Hoja de datos, Descripción, Manual

X24001
128 Bit
FEATURES
2.7V to 5.5V Power Supply
128 Bit Serial E2PROM
Low Power CMOS
—Active Current Less Than 1mA
—Standby Current Less Than 50µA
Internally Organized 16 x 8
2 Wire Serial Interface
High Voltage Programmable Only
—VPGM, 12V to 15V
Push/Pull Output
High Reliability
—Data Retention: 100 Years
Available Packages
—8-Lead MSOP
—8-Lead PDIP
—8-Lead SOIC
X24001
IdentiPROM
16 x 8 Bit
DESCRIPTION
The X24001 is a CMOS 128 bit serial E2PROM, inter-
nally organized as 16 x 8. The X24001 features a serial
interface and software protocol allowing operation on a
simple two wire bus.
The X24001 is ideally suited for identification applica-
tions such as serial numbers or device revision numbers
which need to be stored and retrieved electronically.
VPGM is used to enable writes to the device. This
provides full protection of the data in the user’s environ-
ment where VPGM is not available.
Xicor E2PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years.
The X24001 is fabricated with Xicor’s Advanced CMOS
Floating Gate technology.
FUNCTIONAL DIAGRAM
PIN CONFIGURATION
SCL
CONTROL
LOGIC
SDA
INPUT/
OUTPUT
BUFFER
COMMAND/ADDRESS
REGISTER
SHIFT REGISTER
MEMORY ARRAY
3830 FHD F01
MSOP/DIP/SOIC
NC
NC
NC
VSS
18
27
X24001
36
45
VCC
NC
SCL
SDA
3830 FHD F02.1
IDENTI™ PROM is a trademark of Xicor, Inc.
© Xicor, Inc. 1991, 1995, 1996 Patents Pending
3830-1.5 6/10/96 T2/C1/D0 NS
1
Characteristics subject to change without notice

1 page




X24001MM-2.7 pdf
X24001
Read Operation
The byte read operation is initiated with a start condition.
The start condition is followed by an eight-bit control byte
which consists of a two-bit read command (1,0), four
address bits, and two “don’t care” bits. After receipt of
the control byte, the X24001 will enter the read mode
and transfer data into the shift register from the array.
This data is shifted out of the device on the next eight
SCL clocks. At the end of the read, all counters are reset
and the X24001 will enter the standby mode. As with a
write, the read operation can be interrupted by a start or
stop condition while the command or address is being
clocked in. While clocking data out, starts or stops
cannot be generated.
During the second don’t care clock cycle, starts and
stops are ignored. The master must free the bus prior to
the end of this clock cycle to allow the X24001 to begin
outputting data (Figures 4 and 5).
Figure 4. Read Sequence
START 1 0 A3 A2 A1 A0 XX XX D7 D6 D5 D4 D3 D2 D1 D0
3830 FHD F06
Figure 5. Read Cycle Timing
SCK
SDA IN
SDA OUT
6781
A0 XX XX
D7 D6
3830 FHD F07
SYMBOL TABLE
WAVEFORM INPUTS
OUTPUTS
Must be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
5

5 Page





X24001MM-2.7 arduino
X24001
PACKAGING INFORMATION
8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S
0° – 8°
PIN 1 INDEX
PIN 1
(4X) 7°
0.050 (1.27)
0.014 (0.35)
0.019 (0.49)
0.188 (4.78)
0.197 (5.00)
0.150 (3.80) 0.228 (5.80)
0.158 (4.00) 0.244 (6.20)
0.053 (1.35)
0.069 (1.75)
0.004 (0.19)
0.010 (0.25)
0.010 (0.25)
0.020 (0.50) X 45°
0.016 (0.410)
0.037 (0.937)
0.0075 (0.19)
0.010 (0.25)
0.250"
0.050" TYPICAL
0.050"
TYPICAL
FOOTPRINT
0.030"
TYPICAL
8 PLACES
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
3926 FHD F22.1
11

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