|
|
PDF XCR3128XL Data sheet ( Hoja de datos )
| Número de pieza | XCR3128XL | |
| Descripción | XCR3128XL 128 Macrocell CPLD | |
| Fabricantes | Xilinx | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de XCR3128XL (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
|
No Preview Available !
0
R XCR3128XL 128 Macrocell CPLD
DS016 (v1.8) January 8, 2002
0 14 Preliminary Product Specification
Features
• Lowest power 128 macrocell CPLD
• 6.0 ns pin-to-pin logic delays
• System frequencies up to 145 MHz
• 128 macrocells with 3,000 usable gates
• Available in small footprint packages
- 144-pin TQFP (108 user I/O pins)
- 144-ball CS BGA (108 user I/O)
- 100-pin VQFP (84 user I/O)
• Optimized for 3.3V systems
- Ultra low power operation
- 5V tolerant I/O pins with 3.3V core supply
- Advanced 0.35 micron five layer metal EEPROM
process
- Fast Zero Power™ (FZP) CMOS design
technology
• Advanced system features
- In-system programming
- Input registers
- Predictable timing model
- Up to 23 available clocks per function block
- Excellent pin retention during design changes
- Full IEEE Standard 1149.1 boundary-scan (JTAG)
- Four global clocks
- Eight product term control terms per function block
• Fast ISP programming times
• Port Enable pin for additional I/O
• 2.7V to 3.6V supply voltage at industrial temperature
range
• Programmable slew rate control per output
• Security bit prevents unauthorized access
• Refer to XPLA3 family data sheet (DS012) for
architecture description
Description
The XCR3128XL is a 3.3V 128 macrocell CPLD targeted at
power sensitive designs that require leading edge program-
mable logic solutions. A total of eight function blocks provide
3,000 usable gates. Pin-to-pin propagation delays are
6.0 ns with a maximum system frequency of 145 MHz.
TotalCMOS Design Technique for Fast
Zero Power
Xilinx offers a TotalCMOS CPLD, both in process technol-
ogy and design technique. Xilinx employs a cascade of
CMOS gates to implement its sum of products instead of
the traditional sense amp approach. This CMOS gate imple-
mentation allows Xilinx to offer CPLDs that are both high
performance and low power, breaking the paradigm that to
have low power, you must have low performance. Refer to
Figure 1 and Table 1 showing the ICC vs. Frequency of our
XCR3128XL TotalCMOS CPLD (data taken with eight
resetable up/down, 16-bit counters at 3.3V, 25°C).
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Frequency (MHz)
DS016_01_112100
Figure 1: Typical ICC vs. Frequency at VCC = 3.3V, 25°C
Table 1: Typical ICC vs. Frequency at VCC = 3.3V, 25°C
Frequency (MHz)
0
1
5 10
Typical ICC (mA)
0 0.5 2.2 4.4
20
8.7
40
17.1
60
25.3
80
33.6
100
41.6
120
49.7
140
57.7
© 2002 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS016 (v1.8) January 8, 2002
Preliminary Product Specification
www.xilinx.com
1-800-255-7778
1
1 page  
R
Switching Characteristics
VCC
S1
R1
VIN
R2
VOUT
C1
S2
XCR3128XL 128 Macrocell CPLD
Component
R1
R2
C1
Values
390Ω
390Ω
35 pF
Measurement
S1
S2
TPOE (High)
TPOE (Low)
TP
Open
Closed
Closed
Closed
Open
Closed
Note: For TPOD, C1 = 5 pF. Delay measured at
output level of VOL + 300 mV, VOH – 300 mV.
Figure 3: AC Load Circuit
DS016_03_102401
7.4
7.2
7.0
6.8
6.6
6.4
6.2
6.0
5.8
5.6
1
2 4 8 16
Number of Adjacent Outputs Switching
DS016_04_042800
Figure 4: Derating Curve for TPD2
+3.0V
90%
10%
0V
TR
1.5 ns
TL
1.5 ns
Measurements:
All circuit delays are measured at the +1.5V level of
inputs and outputs, unless otherwise specified.
DS016_05_042800
Figure 5: Voltage Waveform
DS016 (v1.8) January 8, 2002
Preliminary Product Specification
www.xilinx.com
1-800-255-7778
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet XCR3128XL.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| XCR3128XL | XCR3128XL 128 Macrocell CPLD | Xilinx |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |