PDF XA-SCC Data sheet ( Hoja de datos )

Número de pieza	XA-SCC
Descripción	CMOS 16-bit communications microcontroller
Fabricantes	NXP Semiconductors
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No Preview Available ! INTEGRATED CIRCUITS XA-SCC CMOS 16-bit communications microcontroller Preliminary specification Supersedes data of 1999 Feb 23 IC25 Data Handbook 1999 Mar 29 Philips Semiconductors 1 page Philips Semiconductors CMOS 16-bit communications microcontroller Preliminary specification XA-SCC BLOCK DIAGRAM XA CPU INTERRUPT CONTROLLER 256 BYTES RAM RESET CONTROL & STATUS TIMERS 0,1 WATCHDOG TIMER EXTERNAL MEMORY and I/O BUS MIF and DRAM CONTROLLER DMA CHANNELS x8 AUTOBAUD x4 SCCs x4 v.54 2047 x2 SCP INTERFACE IDL INTERFACE NOTE: Main Communications Data paths shown in bold. Figure 1. XA-SCC Block Diagram PORTS and PIN FUNCTION MUX SCP PORT GPIO IDL and NMSI PORTS SU01122 1999 Mar 29 5 5 Page Philips Semiconductors CMOS 16-bit communications microcontroller Preliminary specification XA-SCC Table 2. Memory Mapped Registers MMR Name Read/Write or Read Only SCC0 Write Register 0 SCC0 Write Register 1 SCC0 Write Register 2 SCC0 Write Register 3 SCC0 Write Register 4 SCC0 Write Register 5 SCC0 Write Register 6 SCC0 Write Register 7 SCC0 Write Register 8 SCC0 Write Register 9 SCC0 Write Register 10 SCC0 Write Register 11 SCC0 Write Register 12 SCC0 Write Register 13 SCC0 Write Register 14 SCC0 Write Register 15 SCC0 Write Register 16 SCC0 Write Register 17 SCC0 Read Register 0 SCC0 Read Register 1 Reserved—do not write SCC0 Read Register 3 see WR16 and 17 SCC0 Read Register 6 SCC0 Read Register 7 SCC0 Read Register 8 Reserved SCC0 Read Register 10 Reserved R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W RO RO RO RO RO RO RO SCC1 Write Register 0 SCC1 Write Register 1 SCC1 Write Register 2 SCC1 Write Register 3 SCC1 Write Register 4 SCC1 Write Register 5 SCC1 Write Register 6 SCC1 Write Register 7 SCC1 Write Register 8 SCC1 Write Register 9 SCC1 Write Register 10 SCC1 Write Register 11 SCC1 Write Register 12 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Size Address Offset Description SCCO Registers 8 800h Command register 8 802h Tx/Rx Interrupt & data transfer mode 8 804h Extended Features Control 8 806h Receive Parameter and Control 8 808h Tx/Rx misc. parameters & mode 8 80Ah Tx. parameter and control 8 80Ch Sync character or SDLC address field or Match Character 0 8 80Eh Sync character or SDLC flag or Match Character 1 8 810h Transmit Data Buffer 8 812h Master Interrupt control 8 814h Misc. Tx/Rx control register 8 816h Clock Mode Control 8 818h Lower Byte of Baud rate time constant 8 81Ah Upper Byte of Baud rate time constant 8 81Ch Misc. Control bits 8 81Eh External/Status interrupt control 8 828h Match Character 2 (WR16) 8 82Ah Match Character 3 (WR17) 8 820h Tx/Rx buffer and external status 8 822h Receive condition status/residue code 824h 8 826h Interrupt Pending Bits 828–82Ah see WR16 and WR17 above 8 82Ch SDLC byte count low register 8 82Eh SDLC byte count high & FIFO status 8 830h Receive Buffer 832h 8 834h Loop/clock status 836–83Eh SCC1 Registers 8 840h Command register 8 842h Tx/Rx Interrupt & data transfer mode 8 844h Extended Features Control 8 846h Receive Parameter and Control 8 848h Tx/Rx misc. parameters & mode 8 84Ah Tx. parameter and control 8 84Ch Sync character or SDLC address field or Match Character 0 8 84Eh Sync character or SDLC flag or Match Character 1 8 850h Transmit Data Buffer 8 852h Master Interrupt control 8 854h Misc. Tx/Rx control register 8 856h Clock Mode Control 8 858h Lower Byte of Baud rate time constant Reset Value 00h xx xx 00h 00h 00h 00h xx xx xx 00h xx 00h 00h xx f8h 00h 00h — — — — — — — — — — — 00h xx xx 00h 00h 00h 00h xx xx xx 00h xx 00h 1999 Mar 29 11 11 Page

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