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PDF X9269 Data sheet ( Hoja de datos )

Número de pieza X9269
Descripción Dual Digitally-Controlled Potentiometers
Fabricantes Xicor 
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No Preview Available ! X9269 Hoja de datos, Descripción, Manual

APPLICATION NOTES AND DEVELOPMENT SYSTEM
AVAILABLE
AN99 • AN115 • AN124 •AN133 • AN134 • AN135
Single Supply / Low Power / 256-tap / 2-Wire bus
X9269
Dual Digitally-Controlled (XDCPTM) Potentiometers
FEATURES
• Dual–Two separate potentiometers
• 256 resistor taps/pot–0.4% resolution
• 2-Wire Serial Interface for write, read, and
transfer operations of the potentiometer single
supply device
Wiper Resistance, 100typical VCC = 5V
• 4 Nonvolatile Data Registers for Each
Potentiometer
• Nonvolatile Storage of Multiple Wiper Positions
• Power On Recall. Loads Saved Wiper Position on
Power Up.
• Standby Current < 5µA Max
• 50K, 100Kversions of End to End Pot
Resistance
• 100 yr. Data Retention
• Endurance: 100,000 Data Changes per Bit per
Register
• 24-Lead SOIC, 16-Lead CSP (Chip Scale Pack-
age), 24-Lead TSSOP
• Low Power CMOS
• Power Supply VCC = 2.7V to 5.5V
DESCRIPTION
The X9269 integrates 2 digitally controlled
potentiometer (XDCP) on a monolithic CMOS
integrated circuit.
The digital controlled potentiometer is implemented
using 255 resistive elements in a series array.
Between each element are tap points connected to the
wiper terminal through switches. The position of the
wiper on the array is controlled by the user through the
2-Wire bus interface. Each potentiometer has
associated with it a volatile Wiper Counter Register
(WCR) and a four nonvolatile Data Registers that can
be directly written to and read by the user. The
contents of the WCR controls the position of the wiper
on the resistor array though the switches. Powerup
recalls the contents of the default Data Register (DR0)
to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
FUNCTIONAL DIAGRAM
VCC
RH0
RH1
2-Wire
Bus
Interface
Address
Data
Status
Bus
Interface
and Control
Write
Read
Transfer
Inc/Dec
Control
Power On Recall
Wiper Counter
Registers (WCR)
Data Registers
(DR0–DR3)
VSS
RW0 RL0 RW1 RL1
50Kor 100Kversions
REV 1.1.11 2/17/03
www.xicor.com
Characteristics subject to change without notice. 1 of 25

1 page




X9269 pdf
X9269
PRINCIPLES OF OPERATION
The X9269 is a integrated microcircuit incorporating
four resistor arrays and their associated registers and
counters and the serial interface logic providing direct
communication between the host and the digitally
controlled potentiometers. This section provides detail
description of the following:
– Resistor Array Description
– Serial Interface Description
– Instruction and Register Description.
Array Description
The X9269 is comprised of a resistor array (see Figure
1). Each array contains 255 discrete resistive
segments that are connected in series. The physical
ends of each array are equivalent to the fixed terminals
of a mechanical potentiometer (RH and RL inputs).
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper
(RW) output. Within each individual array only one
switch may be turned on at a time.
Figure 1. Detailed Potentiometer Block Diagram
These switches are controlled by a Wiper Counter
Register (WCR). The 8-bits of the WCR (WCR[7:0])
are decoded to select, and enable, one of 256 switches
(see Table 1).
The WCR may be written directly. These Data
Registers can the WCR can be read and written by the
host system.
Power Up and Down Requirements.
There are no restrictions on the power-up or power-
down conditions of VCC and the voltages applied to the
potentiometer pins provided that VCC is always more
positive than or equal to VH, VL, and VW, i.e., VCC VH,
VL, VW. The VCC ramp rate specification is always in
effect.
One of Two Potentiometers
SERIAL DATA PATH
FROM INTERFACE
CIRCUITRY
REGISTER 0
(DR0)
8
REGISTER 2
(DR2)
IF WCR = 00[H] THEN RW = RL
IF WCR = FF[H] THEN RW = RH
REGISTER 1
(DR1)
8
REGISTER 3
(DR3)
SERIAL
BUS
INPUT
PARALLEL
BUS
INPUT
WIPER
COUNTER
REGISTER
(WCR)
UP/DN
MODIFIED SCL
INC/DEC
LOGIC
UP/DN
CLK
C
O
U
N
T
E
R
D
E
C
O
D
E
RH
RL
RW
REV 1.1.11 2/17/03
www.xicor.com
Characteristics subject to change without notice. 5 of 25

5 Page





X9269 arduino
X9269
Figure 3. Two-Byte Instruction Sequence
SCL
SDA
0101
S ID3 ID2 ID1 ID0 A3
T
A
R
T
Device ID
A2 A1 A0
External
Address
A I3 I2 I1 I0
C
K
Instruction
Opcode
RB RA 0 P0 A
C
K
Register Pot/WCR
Address Address
S
T
O
P
Figure 4. Three-Byte Instruction Sequence
SCL
SDA
0 101
S
T
ID3 ID2 ID1 ID0 A3
A
R Device ID
T
A2 A1 A0 A I3
C
External K
Address
I2 I1 I0
Instruction
Opcode
0
RB RA 0 P0 A
C
K
Register Pot/WCR
Address Address
D7 D6 D5 D4 D3 D2 D1 D0 A S
CT
WCR[7:0]
or
KO
P
Data Register D[7:0]
Figure 5. Increment/Decrement Instruction Sequence
SCL
SDA
0101
0
ID3 ID2 ID1 ID0
S
A3
A2 A1 A0
A I3
I2 I1 I0 RB RA 0 P0 A
I
I
T
A Device ID
R
External
Address
C CNN
K Instruction Register Pot/WCR K C C
Opcode
Address Address
12
T
Figure 6. Increment/Decrement Timing Limits
INC/DEC
CMD
Issued
SCL
tWRID
ID
NE
CC
n1
DS
ET
CO
nP
SDA
RW Voltage Out
REV 1.1.11 2/17/03
www.xicor.com
Characteristics subject to change without notice. 11 of 25

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