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PDF Z8E520 Data sheet ( Hoja de datos )
| Número de pieza | Z8E520 | |
| Descripción | 1.5 MBPS USB Device Controller | |
| Fabricantes | Zilog. | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de Z8E520 (archivo pdf) en la parte inferior de esta página. Total 43 Páginas | ||
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PRELIMINARY PRODUCT SPECIFICATION
Z8E520/C520
1
1.5 MBPS USB LOW-POWER
DEVICE CONTROLLER FOR
MULTIPROTOCOL POINTING DEVICES
FEATURES
Part
Number
Z8E520 (OTP)
Z8C520 (ROM)
ROM
(KB)
6
6
RAM
(Bytes)
176
176
Speed
(MHz)
12
12
s Six Vectored Interrupts with Fixed Priority
s Processor Speed Dividable by Firmware Control
s Operating Current: 5 mA typical in USB Mode; 2.5 mA
typical in Serial Mode (@ 3 MHz); 5 mA typical in PS/2
Mode
s 16 Total Input/Output Pins (Open-Drain/Push-Pull)
Configurable
s 6 inputs with 3 level Programmable Reference
Comparators
s 16-Bit Programmable Watch-Dog Timer (WDT) with
Internal RC Oscillator
s Software Programmable Timers Configurable as:
– Two 8-Bit Standard Timers and One 16-Bit
Standard Timer or
– One 16-Bit Standard Timer and One 16-Bit Pulse
Width Modulator (PWM) Timer
s Identical Masked ROM Version (Z8C520)
s On-Chip Oscillator that accepts a Ceramic Resonator or
External Clock
s Hardware Support for PS/2, Serial, USB, and General-
Purpose I/O (GPIO)
s Power Reduction Modes:
– STOP Mode (functionality shut down except SMR)
– HALT Mode (XTAL still running-peripherals active)
s USB SIE Compliant with USB Spec 1.0
s 4.0 VDC to 6.0 VDC Operating Range @ 0°C to +70°C
GENERAL DESCRIPTION
Zilog’s Z8E520 (OTP) and Z8C520 (Masked ROM) micro-
controllers are low-power Z8Plus MCUs, designed for the
cost-effective implementation of USB and multiprotocol
pointing devices.
For applications demanding powerful I/O capabilities, the
Z8E520's input and output lines are grouped into two ports,
and are configurable under software control to provide tim-
ing, status signals, or parallel I/O.
Both 8-bit and 16-bit timers, with a large number of user se-
lectable modes, off-load the system of administering real-
time tasks such as counting/timing and I/O data communi-
cations.
The microcontroller clock frequency is derived from the
system clock by a programmable divider under firmware
control.
The device is capable of functioning in four distinct, select-
able communications modes: PS/2, RS232, GPIO (Gener-
al-purpose I/O), and USB. The communications mode de-
termines the functionality of the two special serial
communications pins (PB6 and PB7). The device is placed
in the required mode when firmware sets the specified
mode bit in the communications control register. The firm-
ware interface is similar in all modes. The same buffer area
in RAM will accept the data to be transmitted. Up to 8 bytes
may be loaded, and the data will actually be transmitted as
soon as the appropriate command is issued (setting In
Packet Ready in USB mode, for example).
DS97KEY2005
PRELIMINARY
1
1 page  
Zilog
Z8E520/C520
1.5 MBPS USB Device Controller
D0 1
20
D1
D2 CLK (1 MHz)
D3 GND
D4
20-Pin
(CLK OUT)
D5
DIP/SOIC
VCC
D6
D7
TST_CLR
VPP
PGM 10
11 ADDRCLK
Figure 4. 20-Pin DIP/SOIC Pin Assignments:
EPROM Programming Mode
Table 2. 20-Pin DIP/SOIC Pin Identification:
EPROM Programming Mode
EPROM PROGRAMMING Mode
Pin #
1–8
9
10
11
12
13–14
15
16
17
18
19
20
Symbol
D0–D7
TST_CLR
PGM
ADDRCLK
VPP
VCC
CLKOUT
GND
CLK
Function
Data Bus
Reset Internal Address Counter
Program Pin
Clock to Address Counter
High Voltage to Program Device
Unused
Power
Output from Clock Inverter
Power Ref
1 MHz to chip
Unused
Unused
1
Direction
I/O
In
In
In
Power
Power
Out
Power
In
DS97KEY2005
PRELIMINARY
5
5 Page 
Zilog
DC CHARACTERISTICS: I/O MODE
Vcc = 4.0V – 6.0V
Z8E520/C520
1.5 MBPS USB Device Controller
Sym Parameter
TA = 0°C to +70°C
VCC Min Max Units Conditions
VCH Clock Input High
Voltage
0.7VCC VCC+0.3
V Driven by External
Clock Generator
VCL Clock Input Low
Voltage
VSS–0.3 0.2VCC
V Driven by External
Clock Generator
VIH Input High Voltage
VIL Input Low Voltage
VOH Output High Voltage
VOL1 Output Low Voltage
VOL2 Output Low Voltage
VOFFSET Comparator Input Offset
Voltage
0.7VCC
VSS–0.3
VCC–0.4
VCC+0.3
0.2VCC
0.6
1.2
25.0
V
V
V IOH = –2.0 mA
V IOL = +4.0 mA
V IOL = +6 mA,
mV
IIL
IOL
VICR
Input Leakage
Output Leakage
Comparator Input
Common Mode
Voltage Range
–1.0
–1.0
VSS–0.3
2.0
2.0
VCC –1.0
µA VIN = 0V, VCC
µA VIN = 0V, VCC
V
ICC Supply Current
ICCA
ICCB
ICC1 HALT w/ RC and WDT
ICC2
6.0V
5.5V
6.0 mA @ 6 MHz
6.0 mA @ 5.5V
4.0 mA @ 6.0V (6 MHz/2)
60 µA
50 µA
Notes:
1. All outputs unloaded, I/O pins floating, and all inputs are at VCC or VSS level.
2. CL1 = CL2 = 22 pF.
Notes
1,2
1,2
1
DS97KEY2005
PRELIMINARY
11
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| Páginas | Total 43 Páginas | |
| PDF Descargar | [ Datasheet Z8E520.PDF ] | |
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