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PDF Z87L10 Data sheet ( Hoja de datos )
| Número de pieza | Z87L10 | |
| Descripción | Audio Encoder/Decoders | |
| Fabricantes | Zilog. | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de Z87L10 (archivo pdf) en la parte inferior de esta página. Total 22 Páginas | ||
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PRELIMINARY PRODUCT SPECIFICATION
2
Z87010/Z87L10
AUDIO ENCODER/DECODERS
2
FEATURES
Device
Z87010
ROM
(Kbyte)
4
I/O
Lines
16
Z87L10
4
16
Package
Information
44-Pin PLCC
44-Pin QFP
44-Pin QFP
Hardware
s 16-Bit DSP Processor
s 3.0V to 3.6V; -20° to +70°C, Z87L10
4.5V to 5.5V, -20° to +70°C, Z87010
s Static Architecture
s 512 Word On-Chip RAM
s Modified Harvard Architecture
s Direct Interface to Z87000 Frequency Hopping
Spreader/Despreader
s Direct Interface to 8-Bit µ-law Telephone CODEC
s I/O Bus (16-Bit Tristable Data, 3-Bit Address)
s Wait State Generator
s Two External Interrupts
s Four Separate I/O Pins (2 Input, 2 Output)
Software
s Full Duplex 32 Kbps ADPCM Encoding/Decoding
s Single Tone and DTMF Signal Generation
s Sidetone, Volume Control, Mute Functions
s Large Phone Number Memory (21 numbers of 23 digits
each)
s Master-Slave Protocol Interface to Z87000 Spreader/-
Despreader
GENERAL DESCRIPTION
The Z87010/Z87L10 is a second generation CMOS Digital
Signal Processor (DSP) that has been ROM-coded by
Zilog to provide full-duplex 32 Kbps, Adaptive Delta Pulse
Code Modulation (ADPCM) speech coding/decoding (CO-
DEC), and interface to the Z87000/Z87L00 Spread Spec-
trum Cordless Telephone Controller. Together the
Z87000/Z87L00 and Z87010/Z87L10 devices support the
implementation of a 900 MHz frequency-hopping spread
spectrum cordless telephone in conformance with United
States FCC regulations for unlicensed operation.
The Z87010 and Z87L10 are distinct 5V and 3.3V versions
of the ADPCM Audio Encoder/Decoder. For the sake of
brevity, all subsequent references to the Z87010 in this
document also are applicable to the Z87L10, unless spe-
cifically noted.
The Z87010’s single cycle instruction execution and Har-
vard bus structure promote efficient algorithm execution.
The processor contains a 4K word program ROM and 512
word data RAM. Six dual operand fetching. Three vectored
interrupts are complemented by a six level stack. The CO-
DEC interface enables high-speed transfer rate to accom-
modate digital audio and voice data. A dedicated
Counter/Timer provides the necessary timing signals for
the CODEC interface. An additional 13-bit timer is dedicat-
ed for general-purpose use.
The Z87010’s circuitry is optimized to accommodate intri-
cate signal processing algorithms and is used here for
speech compression/decompression, generation of DTMF
tones and other cordless telephone functions. Dedicated
hardware allows direct interface to a variety of CODEC
DS96WRL0601
PRELIMINARY
2-1
1 page  
Zilog
Z87010/Z87L10
Audio Encoder/Decoders
VSS
EXT0
EXT1
EXT2
VSS
RXD
EXT12
EXT13
EXT14
VSS
EXT15
33
34
44
1
Z87010
23
22
12
11
EA0
/RES
/RDYE
ER//W
VDD
SCLK
UI0
UI1
/INT1
/INT2
EXT11
2
Figure 3. 44-Pin QFP Pin Assignments
DS96WRL0601
PRELIMINARY
2-5
5 Page 
Zilog
CK
/EI
ER//W
EXT (15:0)
EA (2:0)
/RDYE
PWW
TCY
TEAD
TIEDF
TXRH
TXRS
TIED
Z87010/Z87L10
Audio Encoder/Decoders
2
EXT Bus:
Input
Valid
Data In
Valid Address Out
TEAD
RDYS
RDYH
Figure 6. Read From External Device Timing
DS96WRL0601
PRELIMINARY
2-11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet Z87L10.PDF ] | |
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