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PDF Z86L43 Data sheet ( Hoja de datos )

Número de pieza Z86L43
Descripción CMOS Z8 CONSUMER CONTROLLER PROCESSOR
Fabricantes Zilog. 
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No Preview Available ! Z86L43 Hoja de datos, Descripción, Manual

Z86L33/L43
CP96LVO1501
PRELIMINAR Y
CUSTOMER P ROCUREMENT S PECIFICA TION
FEATURES
ROM
Part (KB)
Z86L33
4
Z86L43
4
* General-Purpose
RAM*
(Bytes)
237
236
Speed
(MHz)
8
8
s 40-Pin DIP, 44-Pin PLCC and QFP Packages (L43)
28-Pin DIP, 28-Pin SOIC (L33)
s 2.0- to 3.9-Volt Operating Range
s Low-Power Consumption
s 0°C to +70°C Operating Range
s Expanded Register File (ERF)
Z86L33/L43
CMOS Z8®
CONSUMER CONTROLLER PROCESSOR
s 32 Input/Output Lines (L43)
24 Input/Output Lines (L33)
s Vectored, Prioritized Interrupts with
Programmable Polarity
s Two Analog Comparators
s Two Programmable 8-Bit Counter/Timers,
Each with Two 6-Bit Programmable Prescaler
s Watch-Dog Timer (WDT)/Power-On Reset (POR)
s On-Chip Oscillator that Accepts a Crystal, Ceramic
Resonator, LC, RC, or External Clock
s RAM and ROM Protect
GENERAL DESCRIPTION
The Z86L33/L43 Consumer Controller Processor (CCP)
is a member of Zilog's Z8® single-chip microcontroller
family with enhanced wake-up circuitry, programmable
Watch-Dog Timers (WDT), and low-noise/EMI options.
These enhancements result in a more efficient, cost-
effective design and provide the user with increased
design flexibility over the standard Z8 microcontroller
core. This low-power consumption CMOS microcontroller
offers fast execution, efficient use of memory, sophisti-
cated interrupts, input/output bit manipulation capabili-
ties, and easy hardware/software system expansion.
The Z86L33/L43 features an Expanded Register File (ERF)
to allow access to register-mapped peripheral and I/O
circuits. Four basic address spaces are available to sup-
port this wide range of configurations: Program Memory,
Register File, External Data Memory (L43), and ERF. The
Register File is composed of 236 bytes of general-purpose
registers, four I/O port registers, and 15 control and status
registers. The ERF consists of three control registers
(Banks 0,D, and F)
For applications demanding powerful I/O capabilities, the
Z86L33 provides 24 pins, and the Z86L43 provides 32 pins
dedicated to input and output. These lines are configurable
under software control to provide timing,
status signals, parallel I/O with or without handshake, and
address/data bus for interfacing external memory.
To unburden the system from coping with real-time tasks
such as counting/timing and data communication, the
Z86L33/L43 offers two on-chip counter/timers with a large
number of user-selectable modes.
With ROM/ROMless selectivity, the Z86L43 provides both
external memory and pre-programmed ROM, which
enables this Z8 microcontroller to be used in high-volume
applications, or where code flexibility is required.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Power
Ground
Circuit
VCC
GND
Device
VDD
VSS
CP96LVO1501 (6/96)
1

1 page




Z86L43 pdf
PIN DESCRIPTION (Continued)
Z86L33/L43
CP96LVO1501
P21
P22
P23
P24
/DS
N/C
R//W
P25
P26
P27
P04
6 5 4 3 2 1 44 43 42 41 40
7 39
8 38
9 37
10 36
11 35
12 Z86L43 34
13 33
14 32
15 31
16 30
17 29
18 19 20 21 22 23 24 25 26 27 28
P30
P36
P37
P35
/RESET
R//RL
/AS
P34
P33
P32
P31
44-Pin PLCC Pin Assignments
44-Pin PLCC Pin Identification
Pin # Symbol Function
Direction
Pin # Symbol Function
Direction
1-2
3-4
5
6-10
11
GND
P12-13
P03
P20-24
/DS
Ground
Port 1, Pins 2,3
Port 0, Pin 3
Port 2, Pins 0,1,2,3,4
Data Strobe
In/Output
In/Output
In/Output
Output
28 XTAL1
29-31 P31-33
32 P34
33 /AS
34 R//RL
Crystal, Oscillator Clock Input
Port 3, Pins 1,2,3
Input
Port 3, Pin 4
Output
Address Strobe
Output
ROM/ROMless Control Input
12 N/C
13 R//W
14-16 P25-27
17-19 P04-06
20-21 P14-15
22
23,24
25-26
27
P07
V
CC
P16-17
XTAL2
Not Connected
Read/Write
Port 2, Pins 5,6,7
Port 0, Pins 4,5,6
Port 1, Pins 4,5
Output
In/Output
In/Output
In/Output
Port 0, Pin 7
In/Output
Power Supply
Port 1, Pins 6,7
In/Output
Crystal, Oscillator Clock Output
35 /RESET
36 P35
37 P37
38 P36
39 P30
40-41 P00-01
42-43 P10-11
44 P02
Reset
Port 3, Pin 5
Port 3, Pin 7
Port 3, Pin 6
Port 3, Pin 0
Port 0, Pins 0,1
Port 1, Pins 0,1
Port 0, Pin 2
Input
Output
Output
Output
Input
In/Output
In/Output
In/Output
5

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Z86L43 arduino
Z86L33/L43
CP96LVO1501
AC CHARACTERISTICS
External I/O or Memory Read and Write Timing Table (L43 Only)
(SCLK/TCLK = XTAL/2)
No Symbol Parameter
TA=–0°C to 70°C
Note [3] 8 MHz
V Min Max
CC
Units Notes
1 TdA(AS) Address Valid to /AS Rise Delay
2 TdAS(A) /AS Rise to Address Float Delay
2.0 35
3.9 35
2.0 45
3.9 45
ns [2]
ns [2]
ns
3 TdAS(DR) /AS Rise to Read Data Req’d Valid
4 TwAS /AS Low Width
2.0 250
3.9 250
2.0 55
3.9 55
ns [1,2]
ns
ns [2]
ns
5 TdAS(DS) Address Float to /DS Fall
6 TwDSR /DS (Read) Low Width
2.0 0
3.9 0
2.0 200
3.9 200
ns
ns
ns [1,2]
ns
7 TwDSW /DS (Write) Low Width
8 TdDSR(DR) /DS Fall to Read Data Req’d Valid
2.0 110
3.9 110
2.0 150
3.9 150
ns [1,2]
ns
ns [1,2]
ns
9 ThDR(DS) Read Data to /DS Rise Hold Time
10 TdDS(A) /DS Rise to Address Active Delay
2.0 0
3.9 0
2.0 45
3.9 55
ns [2]
ns
ns [2]
ns
11 TdDS(AS) /DS Rise to /AS Fall Delay
12 TdR/W(AS) R//W Valid to /AS Rise Delay
2.0 30
3.9 45
2.0 45
3.9 45
ns [2]
ns
ns [2]
ns
13 TdDS(R/W) /DS Rise to R//W Not Valid
2.0
3.9
14 TdDW(DSW) Write Data Valid to /DS Fall (Write) Delay 2.0
3.9
45
45
55
55
ns [2]
ns
ns [2]
ns
15 TdDS(DW) /DS Rise to Write Data Not Valid Delay 2.0 45
3.9 45
16 TdA(DR) Address Valid to Read Data Req’d Valid 2.0
310
3.9 310
ns [2]
ns
ns [1,2]
ns
17 TdAS(DS) /AS Rise to /DS Fall Delay
2.0 65
3.9 65
18 TdDM(AS) /DM Valid to /AS Rise Delay
2.0 35
3.9 35
19 TdDS(DM) /DS Rise to DM Valid Delay
45
45
20 ThDS(AS) /DS Valid to Address Valid Hold Time
45
45
ns [2]
ns
ns [2]
ns
ns
ns
ns
ns
Notes:
[1] When using extended memory timing add 2 TpC.
[2] Timing numbers given are for minimum TpC.
[3] VCC = 2.0V to 3.9V.
Standard Test Load
All timing references use 0.7 V for a logic 1 and 0.2 V for a logic 0.
CC CC
11

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