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PDF Z86743 Data sheet ( Hoja de datos )

Número de pieza Z86743
Descripción CMOS Z8 OTP Microcontrollers
Fabricantes Zilog. 
Logotipo Zilog. Logotipo



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No Preview Available ! Z86743 Hoja de datos, Descripción, Manual

PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION
1
Z86E33/733/E34
Z86E43/743/E44
1
CMOS Z8® OTP MICROCONTROLLERS
FEATURES
Device
ROM
(KBytes)
Z86E33
4
Z86733
8
Z86E34
16
Z86E43
Z86743
Z86E44
4
8
16
Note: *General-Purpose
RAM*
(Bytes)
237
237
237
236
236
236
I/O
Lines
24
24
24
32
32
32
Speed
(MHz)
16
16
16
16
16
16
s Standard Temperature (VCC = 3.5V to 5.5V)
s Extended Temperature (VCC = 4.5V to 5.5V)
s 28-Pin DIP/SOIC/PLCC Packages (E33/733/E34)
40-Pin DIP Package (E43/743/E44)
44-Pin PLCC/QFP Packages (E43/743/E44)
s Software Enabled Watch-Dog Timer (WDT)
s Push-Pull/Open-Drain Programmable on
Port 0, Port 1, and Port 2
s Low-Power Consumption: 60 mW
s Programmable Crystal Oscillator, EPROM Protect,
RAM Protect, Auto Latch Disable, Permanent WDT,
32 KHz Oscillator, and EPROM /Test Mode Disable
s Fast Instruction Pointer: 0.6µs
s Two Standby Modes: STOP and HALT
s 24/32 Input and Output Lines
s Digital Inputs CMOS Levels, Schmitt-Triggered
s Software Programmable Low EMI Mode
s Two Programmable 8-Bit Counter/Timers Each with a 6-
Bit Programmable Prescaler
s Six Vectored, Priority Interrupts from Six Different
Sources
s Auto Latches
s Auto Power-On Reset (POR)
s Two Comparators
s On-Chip Oscillator that Accepts a Crystal, Ceramic
Resonator, LC, RC, or External Clock Drive
GENERAL DESCRIPTION
The Z86E33/733/E34/E43/743/E44 8-bit CMOS One-Time
Programmable (OTP) microcontrollers are members of
Zilog's Z8® single-chip microcontroller family featuring en-
hanced wake-up circuitry, programmable Watch-Dog Tim-
ers, Low Noise EMI options, and easy hardware/software
system expansion capability.
Four basic address spaces support a wide range of mem-
ory configurations. The designer has easy access to regis-
ter mapped peripheral and I/O circuits.
For applications demanding powerful I/O capabilities, the
Z86E33/733/E34 have 24 pins and the Z86E43/743/E44
have 32 pins of dedicated input and output. These lines are
grouped into four ports, eight lines per port, and are config-
urable under software control to provide timing, status sig-
nals, and parallel I/O with or without handshake, and ad-
dress/data bus for interfacing external memory.
Notes: All Signals with a preceding front slash, "/", are
active Low, e.g., B//W (WORD is active Low); /B/W (BYTE
is active Low, only).
CP97DZ83300
PRELIMINARY
1

1 page




Z86743 pdf
Zilog
Z86E33/733/E34/E43/743/E44
CMOS Z8® OTP Microcontrollers
P21
P22
P23
P24
/DS
NC
R//W
P25
P26
P27
P04
33
34
44
1
QFP 44 - Pin
23
22
12
11
P30
P36
P37
P35
/RESET
R//RL
/AS
P34
P33
P32
P31
1
Figure 4. 44-Pin QFP Pin Configuration
Standard Mode
Table 3. 44-Pin QFP Pin Identification
Pin #
1-2
3-4
5
6-7
8-9
10
11
12-14
15
16
17
18
19
20
21
22
23-24
25-26
Symbol Function
Direction
P05-P06 Port 0, Pins 5,6
In/Output
P14-P05 Port 1, Pins 4,5
In/Output
P07 Port 0, Pin 7
In/Output
VCC Power Supply
P16-P17 Port 1, Pins 6,7
In/Output
XTAL2 Crystal Oscillator
Output
XTAL1 Crystal Oscillator
Input
P31-P13 Port 3, Pins 1,2,3 Input
P34 Port 3, Pin 4
Output
/AS Address Strobe
Output
R//RL ROM/ROMless select Input
/RESET Reset
Input
P35 Port 3, Pin 5
Output
P37 Port 3, Pin 7
Output
P36 Port 3, Pin 6
Output
P30 Port 3, Pin 0
Input
P00-P01 Port 0, Pins 0,1
In/Output
P10-P11 Port 1, Pins 0,1
In/Output
Table 3. 44-Pin QFP Pin Identification
Pin #
27
28-29
30-31
32
33-37
38
39
40
41-43
44
Symbol Function
Direction
P02 Port 0, Pin 2
In/Output
GND Ground
P12-P13 Port 1, Pins 2,3
In/Output
P03 Port 0, Pin 3
In/Output
P20-4 Port 2, Pins 0,1,2,3,4 In/Output
/DS Data Strobe
Output
NC No Connection
R//W Read/Write
Output
P25-P27 Port 2, Pins 5,6,7 In/Output
P04 Port 0, Pin 4
In/Output
CP97DZ83300
PRELIMINARY
5

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