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PDF XRT8010 Data sheet ( Hoja de datos )

Número de pieza XRT8010
Descripción 312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
Fabricantes Exar Corporation 
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No Preview Available ! XRT8010 Hoja de datos, Descripción, Manual

XRT8010
312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
NOVEMBER 2003
REV. 1.0.2
DESCRIPTION
The XRT8010 is a monolithic analog phase locked
loop that provides a high frequency LVDS clock
output, using a low frequency crystal or reference
clock. It is designed for SONET/SDH and other low
jitter applications.The high performance of the IC
provides a very low jitter LVDS clock output up to 320
MHz, while operating at 3.3 volts. The XRT8010 has
a selectable 8x or 16x internal multiplier for an
external crystal or signal source. The Output Enable
pin provides a true disconnect for the LVDS output.
The very compact (4 x 4 mm) low inductance
package is ideal for high frequency operation.
APPLICATIONS
Gigabit Ethernet
SONET/SDH
SPI-4 Phase 2
8x or 16x Clock Multiplier for
s Computer
s Telecommunications Sytems
FEATURES
156 or 320 MHz Operating Range
Low Output Jitter:
s 0.0009 UIRMS typical @ 155.52 MHz, per
Telcordia GR-253-CORE for OC-3.
On Chip Crystal Oscillator Circuit
s Optimized for 15 to 40 MHz crystals
s Uses parallel fundamental mode
Selectable 8x or 16x multiplier
Selectable ÷1 or ÷2 LVDS output
LVDS output meets TIA/EIA 644A Specification
(2001)
3.3V Low power CMOS: <80 mW typical
-40°C to +85°C operating temperature
Extremely small 16-lead QFN package
FIGURE 1. XRT8010 BLOCK DIAGRAM
XTAL1
15-40 MHz
C ry s ta l
XTAL2
AVDD
AVDD
+3.3V
REXT
10k
OVDD
12 - 20 pF
12 - 20 pF
XR T8010
O scillator
C ircuit &
Input Buffer
VCO
C alibration Logic
Phase
D etec to r
Charge
Pump
Loop
Filter
Feedback D ivider
÷ 8 or 16
Voltage Reference
&
Bias G enerator
VCO
S e le c ta b le
÷ 1 or ÷ 2
D ivider
OUTP
LVDS Output
OUTN
AGND
(C ry s tal)
AGND
AGND
FS1
FS0
PD OE OGND
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com

1 page




XRT8010 pdf
XRT8010
REV. 1.0.2
PARAMETER
Power on Calibration time
SYMBOL
Max Frequency Out
FOUT
Max Frequency Out
FOUT
Rise time
TR
Fall Time
TF
Duty cycle
Differential Output Skew
Output Loading
Output voltage Swing
Common Mode Voltage
VCM
Output short circuit current
Cycle-to-Cycle Jitter
Cycle-to-Cycle Jitter
Intinsic Jitter
Intinsic Jitter
Spectral Density of Phase
Noise L(f)
312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
MIN
TYP
MAX
UNIT
CONDITIONS
5 ms After VDD reaches 2.8V
NOTE: Calibration time = 16,000 clock
cycles
140 170 MHz 156 MHz nominal FOUT (see Table 1)
285 340 MHz 312 MHz nominal FOUT (see Table 1)
300 ps CL = 5pF, RL = 100Ω (20% − 80%)
300 ps CL = 5pF, RL = 100Ω (20% − 80%)
45 55 % LVDS output
10 ps See Figure 3
100
250 450 mV Differential (OUTP-OUTN)
1.2 V
-5.7 -8 mA Current limit to ground, VDD or Vp to Vn
3 ps rms, at 156 MHz, Input referred
3 ps rms, at 312 MHz, Input referred
16 ps rms, over 1,000 cycles, at 156 MHz
16 ps rms, over 1,000 cycles, at 312 MHz
PARAMETER
Single Side Band Phase Noise L(f)
COVERSION
320MHz @ 100Hz Offset
320MHz @ 1kHz Offset
320MHz @ 10kHz Offset
320MHz @ 100kHz Offset
320MHz @ 1MHz Offset
320MHz @ 10MHz Offset
TYPICAL
-77.75 dbc/Hz
-100.69 dbc/Hz
-95.38 dbc/Hz
-99.40 dbc/Hz
-105.05 dbc/Hz
-119.03 dbc/Hz
TABLE 1: CATEGORY II INTRINSIC JITTER PER TELCORDIA GR-253-CORE (AT 155MHZ)
JITTER BANDWIDTH
12kHz - 1.3MHz
JITTER (RMS)
5.74
JITTER (UIRMS)
0.0009
12kHz - 5MHz
7.89
0.0012
12kHz - 20MHz
8.99
0.0014
4

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XRT8010 arduino
XRT8010
REV. 1.0.2
312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
FIGURE 8. XRT8010 PHASE NOISE FOR 20 MHZ REFERENCE CRYSTAL
10

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