|
|
PDF IRF7233 Data sheet ( Hoja de datos )
| Número de pieza | IRF7233 | |
| Descripción | Thermoelectric Cooler Controller | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de IRF7233 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
|
No Preview Available !
FEATURES
High Efficiency
Small Size: 5 mm ؋ 5 mm LFCSP
Low Noise: <0.5% TEC Current Ripple
Long-Term Temperature Stability: ؎0.01؇C
Temperature Lock Indication
Temperature Monitoring Output
Oscillator Synchronization with an External Signal
Clock Phase Adjustment for Multiple Controllers
Programmable Switching Frequency up to 1 MHz
Thermistor Failure Alarm
Maximum TEC Voltage Programmability
APPLICATIONS
Thermoelectric Cooler (TEC) Temperature Control
Resistive Heating Element Control
Temperature Stabilization Substrate (TSS) Control
Thermoelectric Cooler Controller
ADN8830
GENERAL DESCRIPTION
The ADN8830 is a monolithic controller that drives a thermo-
electric cooler (TEC) to stabilize the temperature of a laser diode
or a passive component used in telecommunications equipment.
This device relies on a negative temperature coefficient (NTC)
thermistor to sense the temperature of the object attached to the
TEC. The target temperature is set with an analog input voltage
either from a DAC or an external resistor divider.
The loop is stabilized by a PID compensation amplifier with
high stability and low noise. The compensation network can be
adjusted by the user to optimize temperature settling time. The
component values for this network can be calculated based on
the thermal transfer function of the laser diode or obtained
from the lookup table given in the Application Notes section.
Voltage outputs are provided to monitor both the temperature of
the object and the voltage across the TEC. A voltage reference
of 2.5 V is also provided.
FROM
THERMISTOR
TEMPERATURE
SET
INPUT
VREF
FUNCTIONAL BLOCK DIAGRAM
PID COMPENSATION
NETWORK
TEMPERATURE
MEASUREMENT
AMPLIFIER
PWM
CONTROLLER
VOLTAGE
REFERENCE
OSCILLATOR
MOSFET
DRIVERS
P-CHANNEL
(UPPER MOSFET)
N-CHANNEL
P-CHANNEL
(LOWER MOSFET)
N-CHANNEL
FREQUENCY/PHASE
CONTROL
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
1 page  
Typical Performance Characteristics–ADN8830
VDD = 5V
TA = 25؇C
P1
N1
0
000000 000 0
TIME (20ns/DIV)
TPC 1. N1 and P1 Rise Time
0
360
SYNC IN = 200kHz
320 TA = 25؇C
280
240
200
160
120
80
40
0
0 0.4 0.8 1.2 1.6 2.0 2.4
VPHASE (V)
TPC 4. Clock Phase Shift vs. Phase Voltage
VDD = 5V
TA = 25؇C
P1
N1
0
000000 0000
TIME (20ns/DIV)
TPC 2. N1 and P1 Fall Time
0
2.480
2.475
2.470
2.465
2.460
2.455
–40
–15 10 35 60
TEMPERATURE (؇C)
TPC 5. VREF vs. Temperature
85
360
SYNC IN = 1MHz
320 TA = 25؇C
280
240
200
160
120
80
40
0
0 0.4 0.8 1.2 1.6 2.0 2.4
VPHASE (V)
TPC 3. Clock Phase Shift vs. Phase Voltage
1,000
800
VDD = 5V
TA = 25؇C
600
400
200
0
0 250 500 750 1,000 1,250 1,500
RFREQ (k⍀)
TPC 6. Switching Frequency vs. RFREQ
REV. C
–5–
5 Page 
ADN8830
The phase adjusted output from the ADN8830 is available at
SYNCOUT (Pin 28). This pin can be used as a master clock
signal for driving other ADN8830 devices. Multiple ADN8830
devices can be either driven from a single master ADN8830
device by connecting its SYNCOUT pin to each slave’s SYNCIN
pin or daisy-chained by connecting each device’s SYNCOUT to
the next device’s SYNCIN pin.
Phase shifting is useful in systems that use more than one
ADN8830 TEC controller. It ensures the ADN8830 devices
will not switch at the same time, which could create excessive
ripple on the power supply voltage. By adjusting the phase of
each device, the switching transients can be spaced equally over
the clock period, reducing potential supply ripple and easing the
instantaneous current demand from the supply.
Using a single master clock, each slave ADN8830 should have a
different value phase shift. For example, with four TEC con-
trollers, one slave device should be set for 90° of phase shift,
another for 180°, and the last for 270°. In a daisy-chain configu-
ration, each slave device would be set with equal phase. Using
the previous example, each slave would be set to 90° with its
SYNCOUT pin connected to the next device’s SYNCIN pin.
Examples are shown in Figures 7 and 8.
VDD
24
25 ADN8830
7 SLAVE
50k⍀
29
26
150k⍀
28
NC
24
1k⍀
0.1F
1nF
25 ADN8830 28
MASTER
6
29
26
RFREQ
25 ADN8830 28 NC
7 SLAVE
100k⍀
29
100k⍀
24
26 1k⍀
0.1F
1.5M⍀
1nF
150k⍀
25 ADN8830 28 NC
7 SLAVE
29
50k⍀
24
26 1k⍀
0.1F
1.5M⍀
1nF
Figure 7. Multiple ADN8830 Devices Driven from
a Master Clock
Soft Start on Power-Up
The ADN8830 can be programmed to ramp up for a specified
time after the power supply is applied or after shutdown is
de-asserted. This feature, known as soft start, is useful for
gradually increasing the duty cycle of the PWM amplifier. The
soft start time is set with a single capacitor connected from Pin 27
to ground according to Equation 14.
τSS = 150 × CSS
(14)
where CSS is the value of the capacitor in microfarads, and SS is
the soft start time in milliseconds. To set a soft start time of 15 ms,
CSS should equal 0.1 µF. A minimum soft start time of 10 ms is
recommended to ensure proper initialization of the ADN8830
on power-up.
Shutdown Mode
The ADN8830 has a shutdown mode that deactivates the output
stage and puts the device into a low current standby state. The
current draw for the ADN8830 in shutdown is less than 100 µA.
The shutdown input, Pin 3, is active low. To shut down the
device, Pin 3 should be driven to logic low. Once a logic high is
applied, the ADN8830 will reactivate after the delay set by the
soft start circuitry. Refer to the Soft Start on Power-Up section
for more details on this feature.
Pin 3 should not be left floating as there are no internal pull-up
or pull-down resistors. If the shutdown function is not required,
Pin 3 should be tied to VDD to ensure the device is always active.
Compensation Loop
The ADN8830 TEC controller has a built-in amplifier dedicated
for loop compensation. The exact compensation network is set
by the user and can vary from a simple integrator to PI, PID, or
any other type of network. The type of compensation and com-
ponent values should be determined by the user since it will
depend on the thermal response of the object and the TEC. One
method for determining these values empirically is to input a step
function to TEMPSET, thus changing the target temperature,
and adjusting the compensation network to minimize the set-
tling time of the object’s temperature.
A typical compensation network used for temperature control
of a laser module is a PID loop, which consists of a very low
frequency pole and two separate zeros at higher frequencies.
Figure 9 shows a simple network for implementing PID com-
pensation. An additional pole is added at a higher frequency
than the zeros to reduce the noise sensitivity of the control loop.
The bode plot of the magnitude is shown in Figure 10.
VDD
24
1nF
0.1F 1k⍀ 24
1nF
0.1F 1k⍀ 24
1nF
0.1F 1k⍀ 24
NC 25 ADN8830 28
MASTER
25 ADN8830 28
7 SLAVE
25 ADN8830 28
7 SLAVE
25 ADN8830 28 NC
7 SLAVE
6
29
150k⍀
26
150k⍀
29 26
150k⍀
29 26
29 26
RFREQ
50k⍀
1.5M⍀
50k⍀
1.5M⍀
50k⍀
1.5M⍀
REV. C
Figure 8. Multiple ADN8830 Devices Using a Daisy Chain
–11–
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet IRF7233.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| IRF723 | N-Channel Mosfet Transistor |  Inchange Semiconductor |
| IRF723 | TRANSISTORS N-CHANNEL |  International Rectifier |
| IRF723 | N-Channel Power MOSFETs/ 3.0 A/ 350-400 V |  Fairchild Semiconductor |
| IRF723 | Trans MOSFET N-CH 350V 2.8A 3-Pin(3+Tab) TO-220 |  New Jersey Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |