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PDF IRF630S Data sheet ( Hoja de datos )
| Número de pieza | IRF630S | |
| Descripción | N - CHANNEL 200V - 0.35ohm - 9A - D2PAK MESH OVERLAY] MOSFET | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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® IRF630S
N - CHANNEL 200V - 0.35Ω - 9A - D2PAK
MESH OVERLAY™ MOSFET
TYPE
VDSS
RDS(on)
ID
IRF630S
200 V < 0.40 Ω
9A
s TYPICAL RDS(on) = 0.35 Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
s FOR THROUGH-HOLE VERSION CONTACT
SALES OFFICE
DESCRIPTION
This power MOSFET is designed using the
company’s consolidated strip layout-based MESH
OVERLAY™ process. This technology matches
and improves the performances compared with
standard parts from various sources.
APPLICATIONS
s HIGH CURRENT SWITCHING
s UNINTERRUPTIBLE POWER SUPPLY (UPS)
s DC/DC COVERTERS FOR TELECOM,
INDUSTRIAL, AND LIGHTING EQUIPMENT.
3
1
D2PAK
TO-263
(suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Sy mb o l
P a ramet er
V DS
V DGR
Drain-source Voltage (VGS = 0)
Drain- gate Voltage (RGS = 20 kΩ)
VGS
ID
ID
IDM (•)
Ptot
G ate-source Voltage
Drain Current (continuous) at Tc = 25 oC
Drain Current (continuous) at Tc = 100 oC
Drain Current (pulsed)
T otal Dissipat ion at Tc = 25 oC
Derating Factor
dv/dt(1) Peak Diode Recovery voltage slope
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
Va l u e
200
200
± 20
9
5.7
36
70
0.56
5
-65 to 150
150
( 1) ISD ≤ 9A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
Un it
V
V
V
A
A
A
W
W /o C
V/ns
oC
oC
December 1998
1/8
1 page  
Normalized Gate Threshold Voltage vs
Temperature
IRF630S
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/8
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet IRF630S.PDF ] | |
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