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PDF AT80C5112 Datasheet ( Hoja de datos )

Número de pieza AT80C5112
Descripción 8-bit Microcontroller with A/D Converter
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo
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AT80C5112 datasheet

1 Page

AT80C5112 pdf
Pin Configurations
AT8xC5112
VREF
VSS + AVSS
P2.7
P2.6
P2.5
P2.4
P2.3
V2.2
VCC + AVCC
P2.1
P2.0
P3.7
48 47 46 45 44 43 42 41 40 39 38 37
1
2
3
4
5 LQFP48
6
7 7*7*1.4 mm
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
13 14 15 16 17 18 19 20 21 22 23 24
P3.0/RxD
P3.1/TxD
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.2/ECI
P1.3/CEX0
7 6 5 4 3 2 1 52 51 50 49 48 47
VSS
AVSS
P2.7
P2.6
P2.5
P2.4
P2.3
P2.2
AVCC + VCC
P2.1
P2.0
P3.7
VPP
8 46
9 45
10 44
11 43
12
13 PLCC52
42
41
14 40
15 39
16 38
17 37
18 36
19 35
20 34
21 22 23 24 25 26 27 28 29 30 31 32 33
NIC
P3.0/RxD
P3.1/TxD
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.2/ECI
P1.3/CEX0
*NIC: No Internal Connection
4191B805104/03
5

5 Page

AT80C5112 arduino
AT8xC5112
Timer 0: Clock Inputs
Registers
Clock Control Register
A software instruction which sets X2 bit de-activates the prescaler/divider, so the
internal clock is either Xtal_Osc or RC_Osc depending on SEL_OSC bit.
CkIdle
T0 pin
Sub Clock
:6
0
1
SCLKT0
OSCCON
0
1
C/T
TMOD
Control
Timer 0
Gate
INT0
TR0
The SCLKT0 bit in OSCCON register allows to select Timer 0 Subsidiary clock. This
allow to perform a Real Time Clock function.
SCLKT0 = 0: Timer 0 uses the standard T0 pin as clock input (Standard mode)
SCLKT0 = 1: Timer 0 uses the special Sub Clock as clock input.
When the subclock input is selected for Timer 0 and the crystal oscillator is selected for
CPU and peripherals, the CKRL prescaler must be set to FF (division factor 2) in order
to assure a proper count on Timer 0
With an external a 32 kHz oscillator, the timer interrupt can be set from 1/256 to 256
seconds to perform a Real Time Clock (RTC) function. The power consumption will be
very low as the CPU is in idle mode at 32 KHz most of the time. When more CPU power
is needed, the internal RC oscillator is activated and used by the CPU and the others
peripherals.
The clock control register is used to define the clock system behavior.
Table 4. OSCCON - Clock Control Register (8Fh)
76543210
- - - - - SCLKT0 OSCBEN OSCAEN
Bit
Number
7
6
5
4
Bit
Mnemonic
-
-
-
-
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4191B805104/03
11

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