DataSheet.es AT80C5112 Hoja de datos PDF



PDF AT80C5112 Datasheet ( Hoja de datos )

Número de pieza AT80C5112
Descripción 8-bit Microcontroller with A/D Converter
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo
Vista previa
Total 30 Páginas
		
AT80C5112 datasheet

1 Page

AT80C5112 pdf
Pin Configurations
AT8xC5112
VREF
VSS + AVSS
P2.7
P2.6
P2.5
P2.4
P2.3
V2.2
VCC + AVCC
P2.1
P2.0
P3.7
48 47 46 45 44 43 42 41 40 39 38 37
1
2
3
4
5 LQFP48
6
7 7*7*1.4 mm
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
13 14 15 16 17 18 19 20 21 22 23 24
P3.0/RxD
P3.1/TxD
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.2/ECI
P1.3/CEX0
7 6 5 4 3 2 1 52 51 50 49 48 47
VSS
AVSS
P2.7
P2.6
P2.5
P2.4
P2.3
P2.2
AVCC + VCC
P2.1
P2.0
P3.7
VPP
8 46
9 45
10 44
11 43
12
13 PLCC52
42
41
14 40
15 39
16 38
17 37
18 36
19 35
20 34
21 22 23 24 25 26 27 28 29 30 31 32 33
NIC
P3.0/RxD
P3.1/TxD
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.2/ECI
P1.3/CEX0
*NIC: No Internal Connection
4191B805104/03
5

5 Page

AT80C5112 arduino
Power Down Modes
Prescaler Divider
Exit from IDLE modes will leave the oscillator control bits OSCAEN, OSCBEN and
CKS unchanged.
POWER DOWN modes are achieved by using any instruction that writes into
PCON.1 sfr
Exit from POWER DOWN mode is achieved either by a hardware Reset, or by an
external interruption.
By RST signal: The CPU will restart on OSCA.
By INT0 or INT1 interruptions, if enabled. The oscillators control bits OSCAEN,
OSCBEN and CKS will not be changed, so the selected oscillator before entering
into Power-down will be activated.
Table 3. Power Modes
PD IDLE CKS OSCBEN OSCAEN Selected Mode Comment
00 1
X
1 NORMAL MODE A OSCA: XTAL clock
XX
1
X
0 INVALID
no active clock
00 0
1
X NORMAL MODE B OSCB: high speed RC clock
XX
0
0
X INVALID
01 1
X
1 IDLE MODE A
The CPU is off, OSCA supplies the
peripherics
01 0
1
X IDLE MODE B
The CPU is off, OSCB supplies the
peripherics
1XX
X
X
TOTAL POWER
DOWN
The CPU is off, OSCA and OSCB are
stopped OSCC is stopped
An hardware RESET selects the prescaler divider:
CKRL = FFh: internal clock = OscOut/2 (Standard C51 feature)
X2 = 0,
After Reset, any value between FFh down to 00h can be written by software into
CKRL sfr in order to divide frequency of the selected oscillator:
CKRL = 00h: minimum frequency = OscOut/512
CKRL = FFh: maximum frequency = OscOut/2
The frequency of the CPU and peripherals clock CkOut is related to the frequency of the
main oscillator OscOut by the following formula:
FCkOut = FOscOut/(512 - 2*CKRL)
Some examples can be found in the table below:
FOscOut
MHz
12
X2 CKRL
0 FF
FCkOut (Mhz)
6
12 0 FE
3
12 1 x
12
10 AT8xC5112
4191B805104/03

10 Page





PáginasTotal 30 Páginas
PDF Descargar[ AT80C5112.PDF ]

Enlace url


Hoja de datos destacado

Número de piezaDescripciónFabricantes
AT80C51128-bit Microcontroller with A/D ConverterATMEL Corporation
ATMEL Corporation


Número de piezaDescripciónFabricantes
SSM2604

Low Power Audio Codec.

Analog Devices
Analog Devices
SLG3NB3331

32.768 kHz and MHz GreenCLK.

Silego
Silego
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices
SDC1741

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


Index : 0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F  G  H  I  J  K  L  M  N  O  P  Q  R  S  T  U  V  W  X  Y  Z




www.DataSheet.es    |   2018   |  Contacto  |  Buscar