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PDF ICS91718YGLF-T Data sheet ( Hoja de datos )
| Número de pieza | ICS91718YGLF-T | |
| Descripción | Low EMI/ Spread Modulating/ Clock Generator | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ICS91718YGLF-T (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
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Integrated
Circuit
Systems, Inc.
ICS91718
Low EMI, Spread Modulating, Clock Generator
Features:
• ICS91718 is a Spread Spectrum Clock targeted
for Mobile PC and LCD panel applications.
Generates an EMI optimized clock signal (EMI
peak reduction of 7-14 dB on 3rd-19th harmonics)
through use of Spread Spectrum techniques.
• ICS91718 operates with input frequencies at
14.318 - 80 MHz.
• Spread modulation frequency range is 20kHz to
40kHz.
• Spread percentage/type programming through
I2C.
Specifications:
• Supply Voltages: VDD = 3.3V ±0.3V
• Cyc to Cyc jitter: <150ps
• Output duty cycle 45/55%
• Guarantees +85°C operational condition
• 8-pin SOIC (150 mil) package
Pin Configuration
CLKIN 1
VDD 2
GND 3
**CLKOUT/FS_IN0 4
8 PD#*
7 SCLK
6 SDATA
5 REF_OUT/FS_IN1**
8-pin SOIC & TSSOP
Notes:
* Internal pull-up resistor
** Internal pull-down resistor
Input Select Functionality
FS_IN1 FS_IN0
00
01
10
11
MHz
14.318 in
48.00 out
14.318 in
66.66 out
48.00 in/out
66.66 in/out
48.00 in/out
66.66 in/out
SPREAD %
-1.0% down sprd
-1.0% down sprd
-1.0% down sprd
+/-1.0% center sprd
Block Diagram
CLKIN
PLL1
Spread
Spectrum
PD#
FS_IN0:1
SDATA
SCLK
Control
Logic
Config.
Reg.
REFOUT
CLKOUT
0500D—07/15/04
1 page  
ICS91718
BYTE
Affected Pin
0 Pin #
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
-
-
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Bit 0
HW/SW Control
Bit Control
Control Function
0 1 PWD
FS0
FS1
FS2
FS3
FS4
PD# Tri_Sate
Spread Enable
Spread Spectrum Control
FS 2:4 Hard/Software
Select
RW
RW
RW See ROM TABLE
RW
RW
RW Hi-Z LOW
RW OFF ON
RW HW SW
1
0
0
0
0
1
1
0
BYTE
Affected Pin
1 Pin #
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
5
5
4
4
REF_OUT
REF_OUT
FS_IN1 Readback
FS_IN0 Readback
CLK_OUT
CLK_OUT
Reserved
Reserved
Control Function
REF_OUT ENABLE
Slew Rate REF-OUT
FS_IN1 Readback
FS_IN0 Readback
Slew Rate CLK-OUT
CLK_OUT_Enable
Reserved
Reserved
Bit Control
0 1 PWD
RW Disable Enable
RW Nominal Fast
RW -
-
RW -
-
RW Nominal Fast
RW Disable Enable
R-
-
R-
-
1
1
1
1
1
1
1
1
BYTE
Affected Pin
2 Pin #
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
x
x
x
x
x
x
x
x
-
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Control Function
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Bit Control
0 1 PWD
--
-
RW Disable Enable
RW Disable Enable
RW Disable Enable
RW Disable Enable
RW Disable Enable
RW Disable Enable
RW Disable Enable
1
1
1
1
1
1
1
1
0500D—07/15/04
5
5 Page 
ICS91718
N
INDEX
AREA
12
D
A2
e
b
c
E1 E
A
A1
-C-
SEATING
PLANE
aaa C
L
α
SYMBOL
A
A1
A2
b
c
D
E
E1
e
L
N
a
aaa
4.40 mm. Body, 0.65 mm. Pitch TSSOP
(173 mil)
(25.6 mil)
In Millimeters
COMMON DIMENSIONS
MIN MAX
-- 1.20
0.05 0.15
0.80 1.05
0.19 0.30
0.09 0.20
SEE VARIATIONS
6.40 BASIC
4.30 4.50
0.65 BASIC
0.45 0.75
SEE VARIATIONS
0° 8°
-- 0.10
In Inches
COMMON DIMENSIONS
MIN MAX
-- .047
.002 .006
.032 .041
.007 .012
.0035
.008
SEE VARIATIONS
0.252 BASIC
.169 .177
0.0256 BASIC
.018 .030
SEE VARIATIONS
0° 8°
-- .004
VARIATIONS
N
8
D mm.
MIN MAX
2.90 3.10
D (inch)
MIN MAX
.114 .122
Reference Doc.: JEDEC Publication 95, MO-153
10-0035
Ordering Information
ICS91718yGLF-T
Example:
ICS XXXX y G LF- T
0500D—07/15/04
Designation for tape and reel packaging
Lead Free (Optional)
Package Type
G = TSSOP
Revision Designator (will not correlate with datasheet revision)
Device Type
Prefix
ICS = Standard Device
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ICS91718YGLF-T.PDF ] | |
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