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PDF KM681001B-15 Data sheet ( Hoja de datos )

Número de pieza KM681001B-15
Descripción 128K x 8 Bit High-Speed CMOS Static RAM
Fabricantes Samsung semiconductor 
Logotipo Samsung semiconductor Logotipo



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No Preview Available ! KM681001B-15 Hoja de datos, Descripción, Manual

PRELIMINARY
KM681001B
CMOS SRAM
Document Title
128Kx8 Bit High Speed Static RAM(5V Operating), Evolutionary Pin out.
Operated at Commercial and Industrial Temperature Range.
Revision History
Rev.No.
History
Rev. 0.0
Initial release with Design Target.
Rev. 1.0
Release to Preliminary Data Sheet.
1. Replace Design Target to Preliminary.
Rev. 2.0
Release to Final Data Sheet.
1. Delete Preliminary.
2. Delete 17ns, L-version and Industrial Temperature Part.
3. Delete Voh1=3.95V.
4. Delete Data Retention Characteristics and Wave form.
5. Relex operating current
Speed
Previous
Now
15ns
130mA
125mA
17ns
120mA
-
20ns
110mA
123mA
Draft Data
Remark
Feb. 1st, 1997 Design Target
Jun. 1st, 1997 Preliminary
Feb. 6th. 1998 Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the
right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters
of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Rev 2.0
February 1998

1 page




KM681001B-15 pdf
KM681001B
WRITE CYCLE
Parameter
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width(OE High)
Write Pulse Width(OE Low)
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
NOTE : tWR = tWR1, tWR2
Symbol
tWC
tCW
tAS
tAW
tWP
tWP1
tWR*
tWHZ
tDW
tDH
tOW
KM681001B-15
Min Max
15 -
10 -
0-
10 -
10 -
15 -
0-
08
7-
0-
3-
PRELIMINARY
CMOS SRAM
KM681001B-20
Min Max
20 -
12 -
0-
12 -
12 -
20 -
0-
0 10
9-
0-
3-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS1=OE=VIL, CS2=WE=VIH)
Address
Data Out
tOH
Previous Valid Data
tAA
tRC
Valid Data
-5-
Rev 2.0
February 1998

5 Page










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