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PDF SAK-C164CI-LM Data sheet ( Hoja de datos )

Número de pieza SAK-C164CI-LM
Descripción 16-Bit Single-Chip Microcontroller
Fabricantes Infineon Technologies AG 
Logotipo Infineon Technologies AG Logotipo



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No Preview Available ! SAK-C164CI-LM Hoja de datos, Descripción, Manual

Data Sheet, V2.0, May 2001
C164CI/SI
C164CL/SL
16-Bit Single-Chip Microcontroller
Microcontrollers
Never stop thinking.

1 page




SAK-C164CI-LM pdf
16-Bit Single-Chip Microcontroller
C166 Family
C164CI
C164CI/SI, C164CL/SL
• High Performance 16-bit CPU with 4-Stage Pipeline
– 80 ns Instruction Cycle Time at 25 MHz CPU Clock
– 400 ns Multiplication (16 × 16 bit), 800 ns Division (32 / 16 bit)
– Enhanced Boolean Bit Manipulation Facilities
– Additional Instructions to Support HLL and Operating Systems
– Register-Based Design with Multiple Variable Register Banks
– Single-Cycle Context Switching Support
– 16 MBytes Total Linear Address Space for Code and Data
– 1024 Bytes On-Chip Special Function Register Area
• 16-Priority-Level Interrupt System with 32 Sources, Sample-Rate down to 40 ns
• 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
Peripheral Event Controller (PEC)
• Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5),
via prescaler or via direct clock input
• On-Chip Memory Modules
– 2 KBytes On-Chip Internal RAM (IRAM)
– 2 KBytes On-Chip Extension RAM (XRAM)
– up to 64 KBytes On-Chip Program Mask ROM or OTP Memory
• On-Chip Peripheral Modules
– 8-Channel 10-bit A/D Converter with Programmable Conversion Time
down to 7.8 µs
– 8-Channel General Purpose Capture/Compare Unit (CAPCOM2)
– Capture/Compare Unit for flexible PWM Signal Generation (CAPCOM6)
(3/6 Capture/Compare Channels and 1 Compare Channel)
– Multi-Functional General Purpose Timer Unit with 3 Timers
– Two Serial Channels (Synchronous/Asynchronous and High-Speed-Synchronous)
– On-Chip CAN Interface (Rev. 2.0B active) with 15 Message Objects
(Full CAN/Basic CAN)
– On-Chip Real Time Clock
• Up to 4 MBytes External Address Space for Code and Data
– Programmable External Bus Characteristics for Different Address Ranges
– Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit
Data Bus Width
– Four Optional Programmable Chip-Select Signals
• Idle, Sleep, and Power Down Modes with Flexible Power Management
• Programmable Watchdog Timer and Oscillator Watchdog
• Up to 59 General Purpose I/O Lines,
partly with Selectable Input Thresholds and Hysteresis
Data Sheet
1 V2.0, 2001-05

5 Page





SAK-C164CI-LM arduino
C164CI/SI
C164CL/SL
Table 2
Pin Definitions and Functions (contd)
Symbol Pin
No.
Input Function
Outp.
EA/VPP 28
I
External Access Enable pin.
A low level at this pin during and after Reset forces the
C164CI to latch the configuration from PORT0 and pin RD,
and to begin instruction execution out of external memory.
A high level forces the C164CI to latch the configuration
from pins RD and ALE, and to begin instruction execution out
of the internal program memory.
ROMlessversions must have this pin tied to 0.
Note: This pin also accepts the programming voltage for the
OTP derivatives.
PORT0
P0L.0-7 29-
36
P0H.0-7 37-39,
42-46
IO
PORT0 consists of the two 8-bit bidirectional I/O ports P0L
and P0H. It is bit-wise programmable for input or output via
direction bits. For a pin configured as input, the output driver
is put into high-impedance state.
In case of an external bus configuration, PORT0 serves as
the address (A) and address/data (AD) bus in multiplexed
bus modes and as the data (D) bus in demultiplexed bus
modes.
Demultiplexed bus modes:
Data Path Width: 8-bit
16-bit
P0L.0 P0L.7:
D0 D7
D0 D7
P0H.0 P0H.7: I/O
D8 D15
Multiplexed bus modes:
Data Path Width: 8-bit
16-bit
P0L.0 P0L.7:
AD0 AD7 AD0 AD7
P0H.0 P0H.7: A8 A15 AD8 AD15
Data Sheet
7 V2.0, 2001-05

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