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PDF SAF-C167CR-LM Data sheet ( Hoja de datos )

Número de pieza SAF-C167CR-LM
Descripción 16-Bit CMOS Single-Chip Microcontroller
Fabricantes Siemens Semiconductor Group 
Logotipo Siemens Semiconductor Group Logotipo



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No Preview Available ! SAF-C167CR-LM Hoja de datos, Descripción, Manual

Microcomputer Components
16-Bit CMOS Single-Chip Microcontroller
C167CR
Data Sheet 06.95 Advance Information

1 page




SAF-C167CR-LM pdf
C167CR
C167CR
Revision History:
Original Version: 06.95 (Advance Information)
Previous Releases:
Data Sheet C167 06.94
Page
Subjects (changes compared to C167)
32 Register PICON added
37 VILS, VIHS, HYS, IOV added.
37 RRST, IRWH, IRWL, IALEL, IALEH, IP6H, test cond. IOZx changed.
38 IP6L, ICC, IID changed.
39 ICC, IID typical values added
40 ADC specification changed.
43...45
PLL description added.
45 External Clock Drive specification changed.
47
47
53
54
57, 58
59
63
t14, t15, t16, t17, t22, t39, t46 changed.
t47 changed.
t14, t15, t16, t17, t20, t21, t22 changed.
t39, t46, t47, t55 changed.
t53 changed to t68.
t36 changed.
t63 changed.
Controller Area Network (CAN); License of Robert Bosch GmbH
Semiconductor Group
2

5 Page





SAF-C167CR-LM arduino
C167CR
Pin Definitions and Functions (cont’d)
Symbol
WR/
WRL
READY
ALE
EA
PORT0:
P0L.0 -
P0L.7,
P0H.0 -
P0H.7
Pin Input (I) Function
Number Output (O)
96 O
External Memory Write Strobe. In WR-mode this pin is
activated for every external data write access. In WRL-mode
this pin is activated for low byte data write accesses on a 16-
bit bus, and for every data write access on an 8-bit bus. See
WRCFG in register SYSCON for mode selection.
97 I
Ready Input. When the Ready function is enabled, a high
level at this pin during an external memory access will force
the insertion of memory cycle time waitstates until the pin
returns to a low level.
98 O
Address Latch Enable Output. Can be used for latching the
address into external memory or an address latch in the
multiplexed bus modes.
99 I
External Access Enable pin. A low level at this pin during and
after Reset forces the C167CR to begin instruction execution
out of external memory. A high level forces execution out of
the internal ROM. ROMless versions must have this pin tied
to ‘0’.
100 -
107
108,
111-117
I/O
PORT0 consists of the two 8-bit bidirectional I/O ports P0L
and P0H. It is bit-wise programmable for input or output via
direction bits. For a pin configured as input, the output driver
is put into high-impedance state.
In case of an external bus configuration, PORT0 serves as
the address (A) and address/data (AD) bus in multiplexed bus
modes and as the data (D) bus in demultiplexed bus modes.
Demultiplexed bus modes:
Data Path Width: 8-bit
16-bit
P0L.0 - P0L.7:
D0 - D7
D0 - D7
P0H.0 - P0H.7:
I/O
D8 - D15
Multiplexed bus modes:
Data Path Width: 8-bit
16-bit
P0L.0 - P0L.7:
AD0 - AD7
AD0 - AD7
P0H.0 - P0H.7:
A8 - A15
AD8 - AD15
Semiconductor Group
8

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