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PDF SAB-C505-2RM Data sheet ( Hoja de datos )
| Número de pieza | SAB-C505-2RM | |
| Descripción | 8-Bit CMOS Microcontroller | |
| Fabricantes | Siemens Semiconductor Group | |
| Logotipo |  |
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Microcomputer Components
8-Bit CMOS Microcontroller
C505
C505C/C505A
C505CA
Data Sheet 12.97
1 page  
C505 / C505C
C505A / C505CA
Table 2
Ordering Information
Type
SAB-C505-2RM
SAB-C505-LM
SAF-C505-2RM
SAF-C505-LM
SAB-C505C-2RM
SAB-C505C-LM
SAF-C505C-2RM
SAF-C505C-LM
SAB-C505A-4EM
SAF-C505A-4EM
SAB-C505CA-4EM
SAB-C505CA-4EM
Ordering Code Package Description
(8-Bit CMOS microcontroller)
Q67127-DXXXX P-MQFP-44 with mask-programmable ROM (16K), 20 MHz
Q67127-C2057 P-MQFP-44 for external memory (20 MHz)
Extended temperature. – 40 °C to 85 °C :
Q67127-DXXXX P-MQFP-44 with mask-programmable ROM (16K), 20 MHz
Q67127-C2056 P-MQFP-44 for external memory (20 MHz)
Q67127-DXXXX P-MQFP-44 with mask-progr. ROM (16K) and CAN, 20 MHz
Q67127-C2029 P-MQFP-44 for external memory, with CAN (20 MHz)
Extended temperature. – 40 °C to 85 °C :
Q67127-DXXXX P-MQFP-44 with mask-progr. ROM (16K) and CAN, 20 MHz
Q67127-C2030 P-MQFP-44 for external memory, with CAN (20 MHz)
Q67127-C2060 P-MQFP-44 with OTP memory (32K), 20 MHz
Extended temperature. – 40 °C to 85 °C :
Q67127-C2061 P-MQFP-44 with OTP memory (32K), 20 MHz
Q67127-C1082 P-MQFP-44 with OTP memory (32K) and CAN, 20 MHz
Extended temperature. – 40 °C to 85 °C :
Q67127-C2058 P-MQFP-44 with OTP memory (32K) and CAN, 20 MHz
Note: The ordering number of the ROM types (DXXXX extension) is defined after program release
(verification) of the customer.
Versions for the extended temperature range – 40 °C to 110 °C (SAH-C505) and – 40 °C to
125 °C (SAK-C505) are available on request.
Semiconductor Group
5
1997-12-01
5 Page 
C505 / C505C
C505A / C505CA
Table 3
Pin Definitions and Functions (cont’d)
Symbol
P2.0-P2.7
Pin Number
18-25
I/O
*)
I/O
PSEN
26
O
ALE 27
O
*) I = Input
O = Output
Function
Port 2
is a an 8-bit quasi-bidirectional I/O port with internal pullup
resistors. Port 2 pins that have 1’s written to them are pulled
high by the internal pullup resistors, and in that state can be
used as inputs. As inputs, port 2 pins being externally pulled
low will source current (IIL, in the DC characteristics)
because of the internal pullup resistors. Port 2 emits the
high-order address byte during fetches from external
program memory and during accesses to external data
memory that use 16-bit addresses (MOVX @DPTR). In this
application it uses strong internal pullup transistors when
issuing 1s. During accesses to external data memory that
use 8-bit addresses (MOVX @Ri), port 2 issues the
contents of the P2 special function register and uses only
the internal pullup resistors.
The Program Store Enable
output is a control signal that enables the external program
memory to the bus during external fetch operations. It is
activated every three oscillator periods except during
external data memory accesses. Remains high during
internal program execution. This pin should not be driven
during reset operation.
The Address Latch Enable
output is used for latching the low-byte of the address into
external memory during normal operation. It is activated
every three oscillator periods except during an external data
memory access. When instructions are executed from
internal ROM or OTP (EA=1) the ALE generation can be
disabled by bit EALE in SFR SYSCON.
ALE should not be driven during reset operation.
Semiconductor Group
11
1997-12-01
11 Page | ||
| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet SAB-C505-2RM.PDF ] | |
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