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PDF SAB-C504 Data sheet ( Hoja de datos )

Número de pieza SAB-C504
Descripción 8-Bit Single-Chip Microcontroller
Fabricantes Infineon Technologies AG 
Logotipo Infineon Technologies AG Logotipo



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No Preview Available ! SAB-C504 Hoja de datos, Descripción, Manual

Data Sheet, May 2000
C504
8-Bit Single-Chip Microcontroller
Microcontrollers
Never stop thinking.

1 page




SAB-C504 pdf
8-Bit Single-Chip Microcontroller
C500 Family
C504
• Fully compatible to standard 8051 microcontroller
• Up to 40 MHz external operating frequency
• 16 Kbyte on-chip program memory
– C504-2R: ROM version (with optional ROM protection)
– C504-2E: programmable OTP version
– C504-L: without on-chip program memory
• 256 byte on-chip RAM
• 256 byte on-chip XRAM
• Four 8-bit ports
– 2 ports with mixed analog/digital I/O capability
• Three 16-bit timers/counters
– Timer 2 with up/down counter feature
Further features are listed next page.
C504
Oscillator Watchdog
10-Bit ADC
Timer 2
16-Bit
Capture/Compare
Unit
10-Bit Compare Unit
Watchdog Timer
XRAM
256 x 8
RAM
256 x 8
Port 0
T0 Port 1
C500 8-Bit
Core USART
T1 Port 2
ROM/OTP
16 k x 8
Port 3
I/O
8-Bit Digital I/O
4-Bit Analog Inputs
I/O
8-Bit Digital I/O
4-Bit Analog Inputs
MCB02589
Figure 1 C504 Functional Units
Data Sheet
1
2000-05

5 Page





SAB-C504 arduino
C504
Table 1
Pin Definitions and Functions (cont’d)
Symbol
Pin Number I/O1) Function
(P-MQFP-44)
CTRAP 6
I CCU Trap Input
With CTRAP = low, the compare outputs of the
CAPCOM unit are switched to the logic level as
defined in the COINI register (if they are enabled by
the bits in SFR TRCON). CTRAP is an input pin with
an internal pullup resistor. For power saving
reasons, the signal source which drives the CTRAP
input should be at high or floating level during
power-down mode.
XTAL2
14
XTAL2
Output of the inverting oscillator amplifier.
XTAL1
15
XTAL1
Input to the inverting oscillator amplifier and input to
the internal clock generator circuits.
To drive the device from an external clock source,
XTAL1 should be driven, while XTAL2 is left
unconnected. There are no requirements on the
duty cycle of the external clock signal, since the
input to the internal clocking circuitry is divided down
by a divide-by-two flip-flop. Minimum and maximum
high and low times as well as rise/fall times specified
in the AC characteristics must be observed.
P2.0 - P2.7 18-25
I/O Port 2
is a bidirectional I/O port with internal pullup
resistors. Port 2 pins that have “1”s written to them
are pulled high by the internal pullup resistors, and
in that state can be used as inputs. As inputs, Port 2
pins being externally pulled low will source current
(IIL, in the DC characteristics) because of the
internal pullup resistors. Port 2 emits the high-order
address byte during fetches from external program
memory and during accesses to external data
memory that use 16-bit addresses (MOVX @DPTR).
In this application it uses strong internal pullup
resistors when issuing “1”s. During accesses to
external data memory that use 8-bit addresses
(MOVX @Ri), Port 2 issues the contents of the P2
special function register.
Data Sheet
7
2000-05

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