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PDF SAB-C501G-1EP Data sheet ( Hoja de datos )

Número de pieza SAB-C501G-1EP
Descripción 8-Bit CMOS Microcontroller
Fabricantes Siemens Semiconductor Group 
Logotipo Siemens Semiconductor Group Logotipo



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Microcomputer Components
8-Bit CMOS Microcontroller
C501
Data Sheet 04.97

1 page




SAB-C501G-1EP pdf
C501
Note: Versions for extended temperature range – 40 ˚C to 110 ˚C (SAH-C501G) on request.
The ordering number of ROM types (DXXX extensions) is defined after program release
(verification) of the customer.
Additional Literature
For further information about the C501 the following literature is available :
Title
C501 8-Bit CMOS Microcontroller User’s Manual
C500 Microcontroller Family
Architecture and Instruction Set User’s Manual
C500 Microcontroller Family - Pocket Guide
Ordering Number
B158-H6723-X-X-7600
B158-H6987-X-X-7600
B158-H6986-X-X-7600
P1.5
P1.6
P1.7
RESET
RxD/P3.0
N.C.
TxD/P3.1
INT0/P3.2
INT1/P3.3
T0/P3.4
T1/P3.5
6 5 4 3 2 1 44 43 42 41 40
7 39
8 38
9 37
10
11
12 C501
36
35
34
13 33
14 32
15 31
16 30
17 29
18 19 20 21 22 23 24 25 26 27 28
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
EA/VPP
N.C.
ALE/PROG
PSEN
P2.7/A15
P2.6/A14
P2.5/A13
MCP03214
Figure 2
Pin Configuration P-LCC-44 Package (Top view)
Semiconductor Group
5
1997-04-01

5 Page





SAB-C501G-1EP arduino
C501
Table 1
Pin Definitions and Functions (cont’d)
Symbol
Pin Number
I/O*) Function
P-LCC-44 P-DIP-40 P-MQFP-44
PSEN
32
29 26
O The Program Store Enable
output is a control signal that enables the
external program memory to the bus
during external fetch operations. It is
activated every six oscillator periods
except during external data memory
accesses. Remains high during internal
program execution.
RESET
10
9
4
ALE/PROG 33
30 27
I RESET
A high level on this pin for two machine
cycles while the oscillator is running
resets the device. An internal diffused
resistor to VSS permits power-on reset
using only an external capacitor to VCC.
I/O The Address Latch Enable
output is used for latching the low-byte of
the address into external memory during
normal operation. It is activated every six
oscillator periods except during an
external data memory access.
For the C501-1E this pin is also the
program pulse input (PROG) during OTP
memory programming.
EA/VPP
35
31 29
I External Access Enable
When held at high level, instructions are
fetched from the internal ROM (C501-1R
and C501-1E) when the PC is less than
2000H. When held at low level, the C501
fetches all instructions from external
program memory. For the C501-L this
pin must be tied low.
This pin also receives the programming
supply voltage VPP during OTP memory
programming (C501-1E) only).
*) I = Input
O = Output
Semiconductor Group
11
1997-04-01

11 Page







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