DataSheet.es    


PDF SAB-C161K-LM3V Data sheet ( Hoja de datos )

Número de pieza SAB-C161K-LM3V
Descripción 16-Bit Single-Chip Microcontroller
Fabricantes Infineon Technologies AG 
Logotipo Infineon Technologies AG Logotipo



Hay una vista previa y un enlace de descarga de SAB-C161K-LM3V (archivo pdf) en la parte inferior de esta página.


Total 30 Páginas

No Preview Available ! SAB-C161K-LM3V Hoja de datos, Descripción, Manual

Data Sheet, V2.0, Jan. 2001
C161K
C161O
16-Bit Single-Chip Microcontroller
Microcontrollers
Never stop thinking.

1 page




SAB-C161K-LM3V pdf
16-Bit Single-Chip Microcontroller
C166 Family
C161K/O
C161K/O
• High Performance 16-bit CPU with 4-Stage Pipeline
– 80 ns Instruction Cycle Time at 25 MHz CPU Clock
– 400 ns Multiplication (16 × 16 bit), 800 ns Division (32 / 16 bit)
– Enhanced Boolean Bit Manipulation Facilities
– Additional Instructions to Support HLL and Operating Systems
– Register-Based Design with Multiple Variable Register Banks
– Single-Cycle Context Switching Support
– 16 MBytes Total Linear Address Space for Code and Data
– 1024 Bytes On-Chip Special Function Register Area
• 16-Priority-Level Interrupt System with 20 Sources, Sample-Rate down to 40 ns
• 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
Peripheral Event Controller (PEC)
• Clock Generation via prescaler or via direct clock input
• On-Chip Memory Modules
– 2 KBytes On-Chip Internal RAM (IRAM) on C161O,
1 KByte IRAM on C161K
• On-Chip Peripheral Modules
– Two Multi-Functional General Purpose Timer Units with 5 Timers on C161O,
one Timer Unit with 3 Timers on C161K
– Two Serial Channels (Synchronous/Asynchronous and High-Speed-Synchronous)
• Up to 4 MBytes External Address Space for Code and Data
– Programmable External Bus Characteristics for Different Address Ranges
– Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit
Data Bus Width
– Four Programmable Chip-Select Signals on C161O,
two Chip-Select Signals on C161K
• Idle and Power Down Modes
• Programmable Watchdog Timer
• Up to 63 General Purpose I/O Lines
• Power Supply: the C161K/O can operate from a 5 V or a 3 V power supply
• Supported by a Large Range of Development Tools like C-Compilers,
Macro-Assembler Packages, Emulators, Evaluation Boards, HLL-Debuggers,
Simulators, Logic Analyzer Disassemblers, Programming Boards
• On-Chip Bootstrap Loader
• 80-Pin MQFP Package (0.65 mm pitch)
Data Sheet
1 V2.0, 2001-01

5 Page





SAB-C161K-LM3V arduino
C161K
C161O
Table 2
Pin Definitions and Functions (contd)
Symbol Pin Input Function
Num Outp.
RSTIN 65
I/O Reset Input with Schmitt-Trigger characteristics. A low level
at this pin while the oscillator is running resets the C161K/O.
An internal pullup resistor permits power-on reset using only
a capacitor connected to VSS. A spike filter suppresses input
pulses < 10 ns. Input pulses >100 ns safely pass the filter.
The minimum duration for a safe recognition should be
100 ns + 2 CPU clock cycles.
In bidirectional reset mode (enabled by setting bit BDRSTEN
in register SYSCON) the RSTIN line is internally pulled low
for the duration of the internal reset sequence upon any reset
(HW, SW, WDT). See note below this table.
Note: To let the reset configuration of PORT0 settle a reset
duration of ca. 1 ms is recommended.
RST
OUT
66
O
Internal Reset Indication Output. This pin is set to a low level
when the part is executing either a hardware-, a software- or
a watchdog timer reset. RSTOUT remains low until the EINIT
(end of initialization) instruction is executed.
NMI 67
I
Non-Maskable Interrupt Input. A high to low transition at this
pin causes the CPU to vector to the NMI trap routine. When
the PWRDN (power down) instruction is executed, the NMI
pin must be low in order to force the C161K/O to go into
power down mode. If NMI is high, when PWRDN is
executed, the part will continue to run in normal mode.
If not used, pin NMI should be pulled high externally.
P6 IO Port 6 is a 4-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For a pin
configured as input, the output driver is put into high-
impedance state. Port 6 outputs can be configured as push/
pull or open drain drivers.
The Port 6 pins also serve for alternate functions:
P6.0 68
O
CS0
Chip Select 0 Output
P6.1 69
O
CS1
Chip Select 1 Output
P6.2
P6.3
70
71
O
O
CS2
CS3
Chip Select 2 Output
Chip Select 3 Output
These chip select outputs are only available in the C161O.
Data Sheet
7 V2.0, 2001-01

11 Page







PáginasTotal 30 Páginas
PDF Descargar[ Datasheet SAB-C161K-LM3V.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
SAB-C161K-LM3V16-Bit Single-Chip MicrocontrollerInfineon Technologies AG
Infineon Technologies AG

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar