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PDF SAA9740H Data sheet ( Hoja de datos )
| Número de pieza | SAA9740H | |
| Descripción | Advanced Auto Control Function A2CF | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
DATA SHEET
SAA9740H
Advanced Auto Control Function
(A2CF)
Product specification
Supersedes data of 1996 Jan 30
File under Integrated Circuits, IC02
1996 Oct 10
1 page  
Philips Semiconductors
Advanced Auto Control Function (A2CF)
Product specification
SAA9740H
SYMBOL
TSTOUT1
TSTOUT2
TSTOUT3
TSTOUT4
TSTOUT5
VSS3
VDD3
CLK1
VSS4
CDS0
CDS1
CDS2
CDS3
CDS4
CDS5
CDS6
CDS7
SCAN_T
VSS5
AMSAL
Y7
Y6
Y5
Y4
PIN TYPE
41 output
42 output
43 output
44 output
45 output
46 −
47 −
48 input
49 −
50 input
51 input
52 input
53 input
54 input
55 input
56 input
57 input
58 input
59 −
60 input
61 input
62 input
63 input
64 input
DESCRIPTION
output pin for test
output pin for test
output pin for test
output pin for test
output pin for test
ground
digital supply voltage
clock
ground
CDS input from ADC (LSB)
CDS input from ADC
CDS input from ADC
CDS input from ADC
CDS input from ADC
CDS input from ADC
CDS input from ADC
CDS input from ADC (MSB)
test control for scan test
ground
for testing
Y input from SAA9750H (CAMDSP) (MSB)
Y input from SAA9750H (CAMDSP)
Y input from SAA9750H (CAMDSP)
Y input from SAA9750H (CAMDSP)
1996 Oct 10
5
5 Page 
Philips Semiconductors
Advanced Auto Control Function (A2CF)
Product specification
SAA9740H
Data input/output timing (CLK1)
Tamb = −20 to +70 °C; VDD = 2.7 to 3.3 V; VIL = 0 V; VIH = VDD; Vref = 0.5VDD; tr and tf = 6 ns; output load
capacitance = 20 pF; unless otherwise specified.
SYMBOL
tsuDI
thDI
tdDO
thDO
tW CLK1
PARAMETER
data input setup time
data input hold time
data output delay time
data output hold time
width of CLK1
CONDITIONS
note 1
note 1
notes 2 and 3
notes 2 and 3
MIN.
5
8
−
−
−
TYP.
−
−
−
−
50
MAX.
−
−
60
60
−
UNIT
ns
ns
ns
ns
%
Notes
1. Data inputs: UV0 to UV7, Y3 to Y7, AD0 to AD7, UV_SEL, HSYNC, HD, VD and WCLIP.
2. Data outputs: WDINT, CLK2OUT, WDMNT and LWDB (open-drain outputs with 1 kΩ output load resistor).
3. Tamb = 25 °C; VDD = 3.0 V.
handbook, full pagewidth
CLK1
Vref
tf
90%
10%
data inputs
data outputs
tdDO
90%
(1)
10%
tW CLK1
tsuDI
90%
thDI
90%
10%
tdDO
90%
10%
10%
tr
90% VIH
10%
VIL
VIH
VIL
VIH
MHA291
VIL
(1) 50% for open-drain outputs.
Fig.6 Data input/output timing (CLK1).
1996 Oct 10
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet SAA9740H.PDF ] | |
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