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PDF SAA7356HL Data sheet ( Hoja de datos )
| Número de pieza | SAA7356HL | |
| Descripción | 1394 SBP-2 link layer controller | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
SAA7356HL
1394 SBP-2 link layer controller
Preliminary specification
File under Integrated Circuits, IC01
2000 Nov 17
1 page  
Philips Semiconductors
1394 SBP-2 link layer controller
Preliminary specification
SAA7356HL
6 PIN CONFIGURATION
SYMBOL
PIN TYPE(1)
DESCRIPTION
MICRO_ADDR[0] 1 I
microcontroller address input (bit 0); note 2
MICRO_ADDR[1] 2 I
microcontroller address input (bit 1); note 2
MICRO_ADDR[2] 3 I
microcontroller address input (bit 2); note 2
MICRO_ADDR[3] 4 I
microcontroller address input (bit 3); note 2
VDD1(P)
VSS1(P)
MICRO_ADDR[4]
5S
6S
7I
supply voltage 1 for periphery
ground 1 for periphery
microcontroller address input (bit 4); note 2
MICRO_ADDR[5] 8 I
microcontroller address input (bit 5); note 2
MICRO_ADDR[6] 9 I
microcontroller address input (bit 6); note 2
MICRO_ADDR[7] 10 I
microcontroller address input (bit 7); note 2
VDD2(P)
VSS2(P)
DMA_DATA[15]
11 S
12 S
13 I /O
supply voltage 2 for periphery
ground 2 for periphery
DMA data input/output (bit 15); note 3
DMA_DATA[14]
14 I /O
DMA data input/output (bit 14); note 3
DMA_DATA[13]
15 I /O
DMA data input/output (bit 13); note 3
DMA_DATA[12]
16 I /O
DMA data input/output (bit 12); note 3
DMA_DATA[11]
17 I /O
DMA data input/output (bit 11); note 3
DMA_DATA[10]
18 I /O
DMA data input/output (bit 10); note 3
VDD1(C)
VSS1(C)
DMA_DATA[9]
19 S
20 S
21 I /O
supply voltage 1 for core
ground 1 for core
DMA data input/output (bit 9); note 3
DMA_DATA[8]
22 I /O
DMA data input/output (bit 8); note 3
DMA_DATA[7]
23 I /O
DMA data input/output (bit 7); note 3
DMA_DATA[6]
24 I /O
DMA data input/output (bit 6); note 3
DMA_DATA[5]
25 I /O
DMA data input/output (bit 5); note 3
DMA_DATA[4]
26 I /O
DMA data input/output (bit 4); note 3
DMA_DATA[3]
27 I /O
DMA data input/output (bit 3); note 3
DMA_DATA[2]
28 I /O
DMA data input/output (bit 2); note 3
VSS3(P)
VDD3(P)
DMA_DATA[1]
29 S
30 S
31 I /O
ground 3 for periphery
supply voltage 3 for periphery
DMA data input/output (bit 1); note 3
DMA_DATA[0]
32 I /O
DMA data input/output (bit 0); note 3
DMA_REQ
33 O
DMA request signal output in slave mode (acknowledge in master/ATA mode)
(may be configured for active HIGH or active LOW)
DMA_ACK
34 I
DMA acknowledge signal input in slave mode (request in master/ATA mode)
(may be configured for active HIGH or active LOW)
VSS2(C)
VDD2(C)
DMA_READ
35 S
36 S
37 I /O
ground 2 for core
supply voltage 2 for core
DMA read strobe input/output (may be configured for active HIGH or active
LOW)
2000 Nov 17
5
5 Page 
Philips Semiconductors
1394 SBP-2 link layer controller
Preliminary specification
SAA7356HL
handbook, full pagewidth
DMA_REQ
DMA_ACK
DMA_WRITE
(data direction –>)
DMA_READ
(data direction <–)
buffer data 16 or 8-bit
BUFFER
MANAGER
SAA7356HL
slave mode 0
DMA_REQ
DMA_ACK
DMA_WRITE
(data direction –>)
buffer data 16 or 8-bit
BUFFER
MANAGER
SAA7356HL
slave mode 1
DMA_REQ
DMA_ACK
buffer data 16 or 8-bit
BUFFER
MANAGER
SAA7356HL
slave mode 2
GSA040
Fig.4 Slave Mode 0, 1 and 2
handbook, full pagewidth
DMA_ACK DMA_REQ
DMA_REQ DMA_ACK
DMA_WRITE
(data direction –>)
DMA_READ
(data direction <–)
buffer data 16 or 8-bit
BUFFER
MANAGER
SAA7356HL
master mode 0
DMA_ACK DMA_REQ
DMA_REQ DMA_ACK
DMA_WRITE
(data direction –>)
buffer data 16 or 8-bit
BUFFER
MANAGER
SAA7356HL
master mode 1
DMA_ACK DMA_REQ
DMA_REQ DMA_ACK
buffer data 16 or 8-bit
BUFFER
MANAGER
SAA7356HL
master mode 2
GSA041
2000 Nov 17
Fig.5 Master Mode 0, 1 and 2.
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SAA7356HL.PDF ] | |
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