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PDF SAA5X9X Data sheet ( Hoja de datos )

Número de pieza SAA5X9X
Descripción Economy teletext and TV microcontrollers
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! SAA5X9X Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
SAA5x9x family
Economy teletext and TV
microcontrollers
Preliminary specification
File under Integrated Circuits, IC02
1997 Jul 07

1 page




SAA5X9X pdf
Philips Semiconductors
Economy teletext and TV microcontrollers
5 BLOCK DIAGRAM
Preliminary specification
SAA5x9x family
handbook, full pagewidth
BLACK IREF
VDDA VDDM VDDT VSSA VSSD
CVBS0,
CVBS1
DATA SLICER
TELETEXT
ACQUISITION
DISPLAY
XTALIN
XTALOUT
OSCGND
OSCILLATOR
SAA5x9x
ACQUISITION
TIMING
512 × 8
AUX RAM
32K × 8
ROM
PAGE
RAM
DISPLAY
TIMING
256 × 8
RAM
TEXT
INTERFACE
RESET
data
8051
address
MICRO-
CONTROLLER
int
I2C-BUS
INTERFACE
TIMER/
CTRS
ADC
PWM
R, G, B,
VDS,
COR
VSYNC
HSYNC
FRAME
PORT 1
P1.0 to P1.7
PORT 0
PORT 3
P0.0 to P0.7
P3.0 to P3.7
PORT 2
P2.0 to P2.7
MGK462
Fig.1 Block diagram.
1997 Jul 07
5

5 Page





SAA5X9X arduino
Philips Semiconductors
Economy teletext and TV microcontrollers
Preliminary specification
SAA5x9x family
7.3.5 6-BIT PWM DACS
Eight 6-bit DACs are available to allow direct control of analog parts of the television.
Each low resolution 6-bit DAC is controlled by its associated Special Function Register (PWM0 to PWM7). The PWM
outputs are alternative functions of Port 2 and Port 3.4. The PWE bit in the SFR for the port corresponding to the PWM
should be set to logic 1 for correct operation of the PWM, e.g. if PWM0 is to be used, P2.1 should be set to logic 1 setting
the port pin to high-impedance.
7.3.5.1 Pulse Width Modulator Registers (PWM0 to PWM7)
Table 3 Pulse Width Modulator Registers (see Table 10 for addresses)
7
PWE
6
543210
PV5 PV4 PV3 PV2 PV1 PV0
Table 4 Description of PWMn bits (n = 0 to 7)
BIT SYMBOL
DESCRIPTION
7 PWE If PWE is set to a logic 1, the corresponding PWM is active and controls its assigned
port pin. If PWE is set to a logic 0, the port pin is controlled by the corresponding bit in
the port SFR.
6 Not used.
5 PV5 The output of the PWM is a pulse of period 21.33 µs with a pulse HIGH time determined
4 PV4 by the binary value of these 6-bits multiplied by 0.33 µs. PV5 is the most significant bit.
3 PV3
2 PV2
1 PV1
0 PV0
1997 Jul 07
11

11 Page







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