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PDF SC1186 Data sheet ( Hoja de datos )

Número de pieza SC1186
Descripción Programmable Synchronous DC/DC Converter / Dual LDO Controller
Fabricantes Semtech Corporation 
Logotipo Semtech Corporation Logotipo



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SC1186
Programmable Synchronous DC/DC
Converter, Dual LDO Controller
POWER MANAGEMENT
Description
Features
The SC1186 combines a synchronous voltage mode
controller with two low-dropout linear regulators
providing most of the circuitry necessary to implement three
DC/DC converters for powering advanced microprocessors
such as Pentium® II & III.
The SC1186 switching section features an integrated 5
bit D/A converter, latched drive output for enhanced noise
immunity, pulse by pulse current limiting and logic
compatible shutdown. The SC1186 switching section
operates at a fixed frequency of 140kHz, providing an op-
timum compromise between size, efficiency and cost in
the intended application areas. The integrated D/A con-
verter provides programmability of output voltage from 2.0V
to 3.5V in 100mV increments and 1.30V to 2.05V in
50mV increments with no external components.
‹ Synchronous design, enables no heatsink solution
‹ 95% efficiency (switching section)
‹ 5 bit DAC for output programmability
‹ Designed for Intel Pentium® ll & III requirements
‹ 1.5V, 2.5V short circuit protected linear controllers
‹ 1.265V ± 1.5% Reference available
Applications
‹ Pentium® ll & III microprocessor supplies
‹ Flexible motherboards
‹ 1.3V to 3.5V microprocessor supplies
‹ Programmable triple power supplies
The SC1186 linear sections are low dropout regulators
with short circuit protection, supplying 1.5V for GTL bus
and 2.5V for non-GTL I/O. The Reference voltage is made
available for external linear regulators.
Typical Application Circuit
12V
+
5V
47uF
0.1uF
+
1500uF
x4
10
VID0
VID1
VID2
VID3
VID4
EN
0.1uF
3.3V
5 VCC
7 LDOEN
22 VID0
21 VID1
20 VID2
19 VID3
18 VID4
16 EN
1 AGND
23 LDOV
24 GATE2
4 LDOS2
CS+
CS-
VOSENSE
BSTH
DH
BSTL
DL
PGNDH
PGNDL
REF
GATE1
LDOS1
SC1186CS
9
8 0.1uF
17
15
11
14
13
10
12
6
2
3
IRLR3103N
2R2
IRLR3103N
2R2
0.1uF
1.9uH
1k
12V
8
3+
2-
1
LM358
+
330uF
1.5V
IRLR024N
+
330uF
2.5V
+
330uF
IRLR024N
4
1.00k
2.32k
5mOhm
VCC_CORE
3.3V
+
1500uF
x6
0.1uF
IRLR024N
VLIN3
+
330uF
Revision: December 2, 2004
1
www.semtech.com

1 page




SC1186 pdf
SC1186
POWER MANAGEMENT
Block Diagram
VID4
VID3
VID2
VID1
VID0
VOSENSE
AGND
LDOEN
LDOS1
GATE1
VCC
CS- CS+
REF
70mV
CURRENT
LIMIT
+
-
+
D/A -
-
ERROR
AMP
+
EN
OSCILLATOR
R
Q
S
2.5V FET
CONTROLLER
1.275V
REF
1.5V FET
CONTROLLER
LDOV REF
GATE2 LDOS2
BSTH
LEVEL SHIFT AND
HIGH SIDE DRIVE
DH
PGNDH
SHOOT-THRU
CONTROL
SYNCHRONOUS
MOSFET DRIVE
BSTL
DL
PGNDL
2004 Semtech Corp.
5
www.semtech.com

5 Page





SC1186 arduino
SC1186
POWER MANAGEMENT
Theory of Operation (Linear OCP)
The Linear controllers in the SC1186 have built in
Overcurrent Protection (OCP). An overcurrent is assumed
to have occured when the external FET is turned fully on
and the output currrent is RDS(ON) limited, this is detected
by the gate voltage going very high while the output volt-
age is below approximately 40% of it’s setpoint. To allow
for capacitor charging and very short overcurrent dura-
tions, the gate voltage is ramped very slowly upwards when-
ever the output voltage is below the OCP threshold. To
guarantee that the LDO output voltage is capable of reach-
ing it’s setpoint, the gate drive is disabled until both LDOV
Undervoltage Lockout (UVLO) and LDOEN Threshold val-
ues are exceeded, ensuring that there is sufficient gate
drive capability and sufficient LDO input voltage capabil-
ity. A block diagram of one LDO controller is shown below.
12V
LDOV
LDOEN
3.3V
VREF
1.26V
+
-
-
gm
+
10pF
C RAMP
LDOV
-
+
1.3V R2
GATEx
LDOSx
Vout
1.4V/us
1V/ms
Gate
Vout
Vout/2
Time
Startup with no short circuit
If at some later time, a short circuit is applied to the out-
put, the GATEx voltage will ramp up quickly as Vout falls to
try and maintain regulation. Once Vout has fallen to the
OCP threshold, switch S1 will open and the gate will con-
tinue ramping at the 1V/ms rate. If the short is not re-
moved before the GATEx output reaches approximately
LDOV - 0.7V, the GATEx pin will be latched low, disabling
the LDO
Short
applied
1V/ms
Gate
LDOV-0.7V
SWITCH CLOSED
R ON LOW
- S1
+
10nA
R R1
14uA
RESET BY
LDOV LOW
S
Q
R
+
-
LDOV-0.7V
+
AGND
Vout
Vout/2
Time
Short circuit after startup
If the LDO tries to start into a short, the gate ramps at the
1V/ms rate to LDOV - 0.7V, where the GATEx pin will be
latched low.
During a normal start-up, once LDOV and LDOEN have
reached their thresholds, the GATEx pin is released and
CRAMP is charged by 10nA causing the GATEx voltage to
ramp at 10nA/10pF = 1V/ms. Once the GATEx output has
ramped to the external FET threshold, Vout starts to ramp
up, following GATEx. When Vout reaches the OCP thresh-
old, approximately 40% of setpoint, switch S1 is closed
and GATEx ramps up at a much faster rate, followed by
Vout, until Vout reaches setpoint and the loop settles into
steady state regulation.
2004 Semtech Corp.
11
1V/ms
Gate
LDOV-0.7V
Time
Startup into short circuit
www.semtech.com

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