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PDF SC1185ACSW Data sheet ( Hoja de datos )

Número de pieza SC1185ACSW
Descripción PROGRAMMABLE SYNCHRONOUS DC/DC CONVERTER/ DUAL LOW DROPOUT REGULATOR CONTROLLER
Fabricantes Semtech Corporation 
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No Preview Available ! SC1185ACSW Hoja de datos, Descripción, Manual

PRELIMINARY - January 6, 1999
PROGRAMMABLE SYNCHRONOUS DC/DC
CONVERTER, DUAL LOW DROPOUT
REGULATOR CONTROLLER
SC1185
SC1185A
TEL:805-498-2111 FAX:805-498-3804 WEB:http://www.semtech.com
DESCRIPTION
The SC1185 combines a synchronous voltage mode
controller with two low-dropout linear regulators
providing most of the circuitry necessary to
implement three DC/DC converters for powering
advanced microprocessors such as Pentium® II .
The SC1185 switching section features an integrated
5 bit D/A converter, pulse by pulse current limiting,
integrated power good signaling, and logic compatible
shutdown. The SC1185 switching section operates at
a fixed frequency of 140kHz, providing an optimum
compromise between size, efficiency and cost in the
intended application areas. The integrated D/A con-
verter provides programmability of output voltage
from 2.0V to 3.5V in 100mV increments and 1.30V to
2.05V in 50mV increments with no external compo-
nents.
The SC1185 linear sections are low dropout regula-
tors supplying 1.5V for GTL bus and 2.5V for non-
GTL I/O. The Reference voltage is made available for
external linear regulators.
FEATURES
Synchronous design, enables no heatsink solution
95% efficiency (switching section)
5 bit DAC for output programmability
On chip power good function
Designed for Intel Pentium® ll requirements
1.5V, 2.5V @ 1% for linear section
1.265V ± 1.5% Reference available
APPLICATIONS
Pentium® ll microprocessor supplies
Flexible motherboards
1.3V to 3.5V microprocessor supplies
Programmable triple power supplies
ORDERING INFORMATION
Part Number(1)
Package
Linear
Voltage
Temp.
Range (TJ)
SC1185CSW
SO-24 1.5V/2.5V 0° to 125°C
SC1185ACSW(2) SO-24 1.5V/2.5V 0° to 125°C
Note:
(1) Add suffix ‘TR’ for tape and reel.
(2) SC1185A provides improved output tolerance. See
Output Voltage Table.
PIN CONFIGURATION
Top View
AGND
GATE1
LDOS1
LDOS2
VCC
REF
PWRGOOD
CS-
CS+
PGNDH
DH
PGNDL
1
2
3
4
5
6
7
8
9
10
11
12
24 GATE2
23 LDOV
22 VID0
21 VID1
20 VID2
19 VID3
18 VID4
17 VOSENSE
16 EN
15 BSTH
14 BSTL
13 DL
(24 Pin SOIC)
BLOCK DIAGRAM
VCC CS- CS+
VID4
VID3
VID2
VID1
VID0
VOSENSE
PWRGOOD
REF.
D/A
LDOS1
GATE1
FET
CONTROLLER
2.5V/ADJ.
1.265V
REF.
EN
FET
CONTROLLER
1.5V/ADJ.
BSTH
DH
PGNDH
BSTL
DL
PGNDL
LDOV
REF
GATE2 LDOS2 AGND
© 1999 SEMTECH CORP.
Pentium is a registered trademark of Intel Corporation
1
652 MITCHELL ROAD NEWBURY PARK CA 91320

1 page




SC1185ACSW pdf
PRELIMINARY - January 6, 1999
APPLICATION CIRCUIT
PROGRAMMABLE SYNCHRONOUS DC/DC
CONVERTER, DUAL LOW DROPOUT
REGULATOR CONTROLLER
SC1185
SC1185A
© 1999 SEMTECH CORP.
5
652 MITCHELL ROAD NEWBURY PARK CA 91320

5 Page





SC1185ACSW arduino
PROGRAMMABLE SYNCHRONOUS DC/DC
CONVERTER, DUAL LOW DROPOUT
REGULATOR CONTROLLER
SC1185
SC1185A
PRELIMINARY - January 6, 1999
Using 1.5X Room temp RDS(ON) to allow for temperature
rise.
FET type
IRL34025
IRL2203
RDS(on) (m) PD (W)
15 1.69
10.5 1.19
Package
D2PAK
D2PAK
Si4410 20
2.26 SO-8
BOTTOM FET - Bottom FET losses are almost entirely
due to conduction. The body diode is forced into conduc-
tion at the beginning and end of the bottom switch con-
duction period, so when the FET turns on and off, there
is very little voltage across it, resulting in low switching
losses. Conduction losses for the FET can be deter-
mined by:
INPUT CAPACITORS - since the RMS ripple current in
the input capacitors may be as high as 50% of the out-
put current, suitable capacitors must be chosen ac-
cordingly. Also, during fast load transients, there may
be restrictions on input di/dt. These restrictions require
useable energy storage within the converter circuitry,
either as extra output capacitance or, more usually,
additional input capacitors. Choosing low ESR input
capacitors will help maximize ripple rating for a given
size.
PCOND = IO2 RDS(on) (1− δ)
For the example above:
FET type
IRL34025
IRL2203
Si4410
RDS(on) (m) PD (W)
15 1.33
10.5 0.93
20 1.77
Package
D2PAK
D2PAK
SO-8
Each of the package types has a characteristic thermal
impedance, for the TO-220 package, thermal impedance
is mostly determined by the heatsink used. For the sur-
face mount packages on double sided FR4, 2 oz printed
circuit board material, thermal impedances of 40oC/W
for the D2PAK and 80oC/W for the SO-8 are readily
achievable. The corresponding temperature rise is de-
tailed below:
Temperature rise (oC)
FET type Top FET Bottom FET
IRL34025 67.6
IRL2203 47.6
53.2
37.2
Si4410 180.8
141.6
It is apparent that single SO-8 Si4410 are not adequate for
this application, but by using parallel pairs in each posi-
tion, power dissipation will be approximately halved and
temperature rise reduced by a factor of 4.
© 1999 SEMTECH CORP.
11
652 MITCHELL ROAD NEWBURY PARK CA 91320

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