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PDF K6X0808T1D-NB70 Data sheet ( Hoja de datos )

Número de pieza K6X0808T1D-NB70
Descripción 32Kx8 bit Low Power CMOS Static RAM
Fabricantes Samsung semiconductor 
Logotipo Samsung semiconductor Logotipo



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No Preview Available ! K6X0808T1D-NB70 Hoja de datos, Descripción, Manual

K6X0808T1D Family
Document Title
32Kx8 bit Low Power CMOS Static RAM
CMOS SRAM
Revision History
Revision No. History
0.0 Initial draft
0.1 revised
- errata : corrected 28-SOP-525 to 28-SOP-450 in pakage type
0.2 revised
- Added commercial product.
1.0 Finalized
- Changed ICC from 3mA to 2mA
- Changed ICC2 from 25mA to 20mA
- Changed ISB from 3mA to 0.4mA
- Changed ISB1 for K6X0808T1D-F from 10µA to 6µA
- Changed ISB1 for K6X0808T1D-F from 20µA to 10µA
- Changed IDR for K6X0808T1D-F 10µA to 6µA
- Changed IDR for K6X0808T1D-Q 20µA to 10µA
- Errata correction
Draft Data
October 09, 2002
November 08, 2002
Remark
Preliminary
Preliminary
March 27, 2003
Preliminary
December 16, 2003 Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions. If you have any questions, please contact the SAMSUNG branch offices.
1 Revision 1.0
December 2003

1 page




K6X0808T1D-NB70 pdf
K6X0808T1D Family
CMOS SRAM
AC OPERATING CONDITIONS
TEST CONDITIONS( Test Load and Input/Output Reference)
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage:1.5V
Output load(see right): CL=100pF+1TTL
CL=30pF+1TTL
CL1)
1. Including scope and jig capacitance
AC CHARACTERISTICS (VCC=2.7~3.6V, Industrial product:TA=-40 to 85°C, Automotive product:TA=-40 to 125°C )
Parameter List
Read
Write
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Valid Output
Chip Select to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
Symbol
tRC
tAA
tCO
tOE
tLZ
tOLZ
tHZ
tOHZ
tOH
tWC
tCW
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
Speed Bins
70ns
85ns
Min Max Min Max
70 - 85 -
- 70 - 85
- 70 - 85
- 35 - 40
10 - 10 -
5-5-
0 25 0 25
0 25 0 25
10 - 15 -
70 - 85 -
60 - 70 -
0-0-
60 - 70 -
50 - 60 -
0-0-
0 25 0 30
25 - 35 -
0-0-
5-5-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Symbol
Test Condition
Min Typ Max Unit
VDR CS1Vcc-0.2V
2.0 - 3.6 V
IDR Vcc=3.0V, CS1Vcc-0.2V
K6X0808T1D-F
K6X0808T1D-Q
-
- 6 µA
10 µA
tSDR
tRDR
See data retention waveform
0 - - ms
5- -
5 Revision 1.0
December 2003

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