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PDF K6T4008C Data sheet ( Hoja de datos )

Número de pieza K6T4008C
Descripción 512Kx8 bit Low Power CMOS Static RAM
Fabricantes Samsung semiconductor 
Logotipo Samsung semiconductor Logotipo



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K6T4008C1B Family
Document Title
512Kx8 bit Low Power CMOS Static RAM
Revision History
Revision No. History
0.0 Initial Draft
0.1 Revise
- Changed Operating current by reticle revision
ICC at write : 35mA 45mA
ICC1 at read/write : 15/35mA 10/45mA
1.0 Finalize
- Changed Operating current
ICC1 at write : 45mA 40mA
ICC2; 90mA 80mA
- Change test load at 55ns : 100pF 50pF
2.0 Revise
- Change datasheet format
3.0 Revise
- Industrial product speed bin change:70/100ns 55/70ns
CMOS SRAM
Draft Date
December 7, 1996
Remark
Advance
March 6, 1997
Preliminary
October 9, 1997
Final
February 17, 1998 Final
September 8, 1998 Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1 Revision 3.0
September 1998

1 page




K6T4008C pdf
K6T4008C1B Family
AC OPERATING CONDITIONS
TEST CONDITIONS (Test Load and Test Input/Output Reference)
Input pulse level: 0.8 to 2.4V
Input rising and falling time: 5ns
Input and output reference voltage: 1.5V
Output load (See right): CL=100pF+1TTL
CL=50pF+1TTL
CMOS SRAM
CL1)
1. Including scope and jig capacitance
AC CHARACTERISTICS (Vcc=4.5~5.5V, Commercial product: TA=0 to 70°C, Industrial product: TA=-40 to 85°C)
Parameter List
Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
Symbol
tRC
tAA
tCO
tOE
tLZ
tOLZ
tHZ
tOHZ
tOH
tWC
tCW
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
Speed Bins
55*ns
70ns
Min Max Min Max
55 - 70 -
- 55 - 70
- 55 - 70
- 25 - 35
10 - 10 -
5-5 -
0 20 0 25
0 20 0 25
10 - 10 -
55 - 70 -
45 - 60 -
0-0 -
45 - 60 -
40 - 50 -
0-0 -
0 20 0 25
25 - 30 -
0-0 -
5-5 -
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Symbol
Test Condition
VDR CSVcc-0.2V
K6T4008C1B-L
IDR Vcc=3.0V, CSVcc-0.2V
K6T4008C1B-B
K6T4008C1B-P
K6T4008C1B-F
tSDR
tRDR
See data retention waveform
Min Typ Max Unit
2.0 - 5.5 V
- - 50
- - 15 µA
- - 50
- - 20
0- -
ms
5- -
5 Revision 3.0
September 1998

5 Page










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