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PDF K6R1008C1B-I10 Data sheet ( Hoja de datos )

Número de pieza K6R1008C1B-I10
Descripción 128Kx8 Bit High Speed Static RAM5V Operating/ Revolutionary Pin out. Operated at Commercial and Industrial Temperature Ranges.
Fabricantes Samsung semiconductor 
Logotipo Samsung semiconductor Logotipo



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No Preview Available ! K6R1008C1B-I10 Hoja de datos, Descripción, Manual

K6R1008C1B-C, K6R1008C1B-I
PRELIMINARY
PRPEreLlIiMmIiNnAarRyY
CMOS SRAM
Document Title
128Kx8 Bit High Speed Static RAM(5V Operating), Revolutionary Pin out.
Operated at Commercial and Industrial Temperature Ranges.
Revision History
Rev No.
History
Rev. 0.0
Initial release with Design Target.
Rev.1.0
Release to Preliminary Data Sheet.
1.1. Replace Design Target to Preliminary.
Rev.2.0
Release to Final Data Sheet.
2.1. Delete Preliminary.
2.2. Delete 32-SOJ-300 package.
2.3. Delete L-version.
2.4. Delete Data Retention Characteristics and Waveform.
2.5. Add Capacitive load of the test environment in A.C test load.
2.6. Change D.C characteristics.
Items
Previous spec.
(8/10/12ns part)
Changed spec.
(8/10/12ns part)
ICC
160/150/140mA
160/155/150mA
ISB
30mA
50mA
Draft Data
Apr. 1st, 1997
Jun. 1st, 1997
Remark
Design Target
Preliminary
Feb. 25th, 1998 Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Rev 2.0
February 1998

1 page




K6R1008C1B-I10 pdf
K6R1008C1B-C, K6R1008C1B-I
WRITE CYCLE*
Parameter
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width (OE High)
Write Pulse Width (OE Low)
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
Symbol
tWC
tCW
tAS
tAW
tWP
tWP1
tWR
tWHZ
tDW
tDH
tOW
K6R1008C1B-8
Min Max
8-
6-
0-
6-
6-
8-
0-
04
4-
0-
3-
* The above parameters are also guaranteed at industrial temperature range.
PRELIMINARY
PRPEreLlIiMmIiNnAarRyY
CMOS SRAM
K6R1008C1B-10
Min Max
10 -
7-
0-
7-
7-
10 -
0-
05
5-
0-
3-
K6R1008C1B-12
Min Max
12 -
8-
0-
8-
8-
12 -
0-
06
6-
0-
3-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH)
Address
Data Out
tOH
Previous Valid Data
tAA
tRC
Valid Data
TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)
Address
CS
OE
Data out
VCC
Current
ICC
ISB
tAA
tCO
tOE
tOLZ
tLZ(4,5)
tPU
50%
tRC
tHZ(3,4,5)
tOHZ
Valid Data
tOH
tPD
50%
-5-
Rev 2.0
February 1998

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