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Número de pieza | K6F2016U4E-F | |
Descripción | 128K x16 bit Super Low Power and Low Voltage Full CMOS Static RAM | |
Fabricantes | Samsung semiconductor | |
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CMOS SRAM
Document Title
128K x16 bit Super Low Power and Low Voltage Full CMOS Static RAM
Revision History
Revision No. History
0.0 Initial Draft
1.0 Finalize
- Change ICC2 from 21 to 26mA for 55ns product.
- Change ICC2 from 17 to 20mA for 70ns product.
- Remove "A1 Index Mark" of 48-TBGA package bottom side
2.0 Revise
- Changed 48-TBGA vertical dimension
E1(Typical) 0.55mm to 0.58mm
E2(Typical) 0.35mm to 0.32mm
Draft Date
February 21, 2001
Remark
Preliminary
April 30, 2001
Final
September 27, 2001 Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
- 1 - Revision 2.0
September 2001
1 page K6F2016U4E Family
CMOS SRAM
AC OPERATING CONDITIONS
VTM3)
TEST CONDITIONS(Test Load and Test Input/Output Reference)
Input pulse level: 0.4 to 2.2V
R12)
Input rising and falling time: 5ns
Input and output reference voltage: 1.5V
Output load (See right): CL=100pF+1TTL
CL1)
R22)
CL=30pF+1TTL
1. Including scope and jig capacitance
2. R1=3070Ω, R2=3150Ω
3. VTM =2.8V
AC CHARACTERISTICS(Vcc=2.7~3.3V, Industrial product:TA=-40 to 85°C)
Parameter List
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Valid Output
UB, LB Access Time
Read Chip Select to Low-Z Output
UB, LB Enable to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
UB, LB Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
UB, LB Valid to End of Write
Write Write Pulse Width
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
1. The parameter is measured with 30pF test load.
Symbol
tRC
tAA
tCO
tOE
tBA
tLZ
tBLZ
tOLZ
tHZ
tBHZ
tOHZ
tOH
tWC
tCW
tAS
tAW
tBW
tWP
tWR
tWHZ
tDW
tDH
tOW
Speed Bins
55ns1)
70ns
Min Max Min Max
55 - 70 -
- 55 - 70
- 55 - 70
- 25 - 35
- 55 - 70
10 - 10 -
10 - 10 -
5-5-
0 20 0 25
0 20 0 25
0 20 0 25
10 - 10 -
55 - 70 -
45 - 60 -
0-0-
45 - 60 -
45 - 60 -
40 - 50 -
0-0-
0 20 0 20
25 - 30 -
0-0-
5-5-
DATA RETENTION CHARACTERISTICS
Item
Symbol
Test Condition
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
VDR
IDR
tSDR
tRDR
CS≥Vcc-0.2V1)
Vcc= 1.5V, CS≥Vcc-0.2V1)
See data retention waveform
1. 1) CS≥Vcc-0.2V(CS controlled) or
2) LB=UB≥Vcc-0.2V, CS≤0.2V(LB/UB controlled)
2. Typical value are measured at TA=25°C and not 100% tested.
Min Typ2) Max
1.5 - 3.3
- 0.5 2
0- -
tRC -
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
V
µA
ns
- 5 - Revision 2.0
September 2001
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet K6F2016U4E-F.PDF ] |
Número de pieza | Descripción | Fabricantes |
K6F2016U4E-F | 128K x16 bit Super Low Power and Low Voltage Full CMOS Static RAM | Samsung semiconductor |
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