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PDF K5A3380YTC-T755 Data sheet ( Hoja de datos )

Número de pieza K5A3380YTC-T755
Descripción MCP MEMORY
Fabricantes Samsung semiconductor 
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K5A3x80YT(B)C
Preliminary
MCP MEMORY
Document Title
Multi-Chip Package MEMORY
32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 8M(1Mx8/512Kx16) Full CMOS SRAM
Revision History
Revision No. History
0.0 Initial Draft
Draft Date
Remark
November 6, 2002 Preliminary
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
- 1 - Revision 0.0
November 2002

1 page




K5A3380YTC-T755 pdf
K5A3x80YT(B)C
Preliminary
MCP MEMORY
Table 1. Flash Memory Top Boot Block Address (K5A3280YT/K5A3380YT)
K5
A3280
YT
K5
A3380
YT
Block
Block Address
A20 A19 A18 A17 A16 A15 A14 A13 A12
Block Size
(KB/KW)
BA34 1 0 0 0 1 0 X X X
64/32
Bank1 BA33 1 0 0 0 0 1 X X X
64/32
BA32 1 0 0 0 0 0 X X X
64/32
BA31 0 1 1 1 1 1 X X X
64/32
BA30 0 1 1 1 1 0 X X X
64/32
BA29 0 1 1 1 0 1 X X X
64/32
BA28 0 1 1 1 0 0 X X X
64/32
BA27 0 1 1 0 1 1 X X X
64/32
BA26 0 1 1 0 1 0 X X X
64/32
BA25 0 1 1 0 0 1 X X X
64/32
BA24 0 1 1 0 0 0 X X X
64/32
BA23 0 1 0 1 1 1 X X X
64/32
BA22 0 1 0 1 1 0 X X X
64/32
BA21 0 1 0 1 0 1 X X X
64/32
BA20 0 1 0 1 0 0 X X X
64/32
BA19 0 1 0 0 1 1 X X X
64/32
BA18 0 1 0 0 1 0 X X X
64/32
Bank2
BA17 0 1 0 0 0 1 X X X
64/32
BA16 0 1 0 0 0 0 X X X
Bank2
BA15 0 0 1 1 1 1 X X X
64/32
64/32
BA14 0 0 1 1 1 0 X X X
64/32
BA13 0 0 1 1 0 1 X X X
64/32
BA12 0 0 1 1 0 0 X X X
64/32
BA11 0 0 1 0 1 1 X X X
64/32
BA10 0 0 1 0 1 0 X X X
64/32
BA9 0 0 1 0 0 1 X X X
64/32
BA8 0 0 1 0 0 0 X X X
64/32
BA7 0 0 0 1 1 1 X X X
64/32
BA6 0 0 0 1 1 0 X X X
64/32
BA5 0 0 0 1 0 1 X X X
64/32
BA4 0 0 0 1 0 0 X X X
64/32
BA3 0 0 0 0 1 1 X X X
64/32
BA2 0 0 0 0 1 0 X X X
64/32
BA1 0 0 0 0 0 1 X X X
64/32
BA0 0 0 0 0 0 0 X X X
64/32
Address Range
Byte Mode
Word Mode
220000H-22FFFFH
210000H-21FFFFH
200000H-20FFFFH
110000H-117FFFH
108000H-10FFFFH
100000H-107FFFH
1F0000H-1FFFFFH
1E0000H-1EFFFFH
1D0000H-1DFFFFH
0F8000H-0FFFFFH
0F0000H-0F7FFFH
0E8000H-0EFFFFH
1C0000H-1CFFFFH
1B0000H-1BFFFFH
1A0000H-1AFFFFH
0E0000H-0E7FFFH
0D8000H-0DFFFFH
0D0000H-0D7FFFH
190000H-19FFFFH
180000H-18FFFFH
170000H-17FFFFH
0C8000H-0CFFFFH
0C0000H-0C7FFFH
0B8000H-0BFFFFH
160000H-16FFFFH
150000H-15FFFFH
140000H-14FFFFH
130000H-13FFFFH
120000H-12FFFFH
0B0000H-0B7FFFH
0A8000H-0AFFFFH
0A0000H-0A7FFFH
098000H-09FFFFH
090000H-097FFFH
110000H-11FFFFH
100000H-10FFFFH
0F0000H-0FFFFFH
088000H-08FFFFH
080000H-087FFFH
078000H-07FFFFH
0E0000H-0EFFFFH
0D0000H-0DFFFFH
0C0000H-0CFFFFH
070000H-077FFFH
068000H-06FFFFH
060000H-067FFFH
0B0000H-0BFFFFH
0A0000H-0AFFFFH
058000H-05FFFFH
050000H-057FFFH
090000H-09FFFFH
080000H-08FFFFH
070000H-07FFFFH
048000H-04FFFFH
040000H-047FFFH
038000H-03FFFFH
060000H-06FFFFH
050000H-05FFFFH
040000H-04FFFFH
030000H-037FFFH
028000H-02FFFFH
020000H-027FFFH
030000H-03FFFFH
020000H-02FFFFH
010000H-01FFFFH
000000H-00FFFFH
018000H-01FFFFH
010000H-017FFFH
008000H-00FFFFH
000000H-007FFFH
NOTE: The address range is A20 A-1 in the byte mode ( BYTEF = VIL ) or A20 A0 in the word mode ( BYTEF = VIH ).
The bank address bits is A20 A19 for K5A3280YT, A20 for K5A3380YT.
Table 2. Secode Block Addresses for Top Boot Devices
Device
Block Address
A20-A12
Block
Size
K5A3280YT/K5A3380YT
111111xxx
64/32
(X8)
Address Range
3F0000H-3FFFFFH
(X16)
Address Range
1F8000H-1FFFFFH
- 5 - Revision 0.0
November 2002

5 Page





K5A3380YTC-T755 arduino
K5A3x80YT(B)C
Preliminary
MCP MEMORY
Flash DEVICE OPERATION
Byte/Word Mode
If the BYTEF ball is set at logical "1" , the device is in word mode, DQ0-DQ15 are active. Otherwise the BYTEF ball is set at logical "0"
, the device is in byte mode, DQ0-DQ7 are active. DQ8-DQ14 are in the High-Z state and DQ15 ball is used as an input for the LSB
(A-1) address ball.
Read Mode
Flash memory is controlled by Chip Enable (CEF), Output Enable (OE) and Write Enable (WE). When CEF and OE are low and WE
is high, the data stored at the specified address location,will be the output of the device. The outputs are in high impedance state
whenever CEF or OE is high.
Standby Mode
Flash memory features Stand-by Mode to reduce power consumption. This mode puts the device on hold when the device is dese-
lected by making CEF high (CEF = VIH). Refer to the DC characteristics for more details on stand-by modes.
Output Disable
The device outputs are disabled when OE is High (OE = VIH). The output balls are in high impedance state.
Automatic Sleep Mode
Flash memory features Automatic Sleep Mode to minimize the device power consumption. Since the device typically draws 5µA of
current in Automatic Sleep Mode, this feature plays an extremely important role in battery-powered applications. When addresses
remain steady for tAA+50ns, the device automatically activates the Automatic Sleep Mode. In the sleep mode, output data is latched
and always available to the system. When addresses are changed, the device provides new data without wait time.
Address
tAA + 50ns
Outputs
Data
Data
Data
Data
Data
Data
Auto Sleep Mode
Figure 2. Auto Sleep Mode Operation
Autoselect Mode
Flash memory offers the Autoselect Mode to identify manufacturer and device type by reading a binary code. The Autoselect Mode
allows programming equipment to automatically match the device to be programmed with its corresponding programming algorithm.
In addition, this mode allows the verification of the status of write protected blocks. The manufacturer and device code can be read
via the command register. The Command Sequence is shown in Table 5 and Figure 3. The autoselect operation of block protect ver-
ification is initiated by first writing two unlock cycle. The third cycle must contain the bank address and autoselect command (90H). If
Block address while (A6, A1, A0) = (0,1,0) is finally asserted on the address ball, it will produce a logical "1" at the device output DQ0
to indicate a write protected block or a logical "0" at the device output DQ0 to indicate a write unprotected block. To terminate the
autoselect operation, write Reset command (F0H) into the command register.
- 11 -
Revision 0.0
November 2002

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