DataSheet.es    


PDF K4S51163PF-YF Data sheet ( Hoja de datos )

Número de pieza K4S51163PF-YF
Descripción 8M x 16Bit x 4 Banks Mobile-SDRAM
Fabricantes Samsung semiconductor 
Logotipo Samsung semiconductor Logotipo



Hay una vista previa y un enlace de descarga de K4S51163PF-YF (archivo pdf) en la parte inferior de esta página.


Total 12 Páginas

No Preview Available ! K4S51163PF-YF Hoja de datos, Descripción, Manual

K4S51163PF-Y(P)F
Mobile-SDRAM
8M x 16Bit x 4 Banks Mobile-SDRAM
FEATURES
• 1.8V power supply.
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
-. CAS latency (1, 2 & 3).
-. Burst length (1, 2, 4, 8 & Full page).
-. Burst type (Sequential & Interleave).
• EMRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system
clock.
• Burst read single-bit write operation.
• Special Function Support.
-. PASR (Partial Array Self Refresh).
-. Internal TCSR (Temperature Compensated Self Refresh)
-. DS (Driver Strength)
• DQM for masking.
• Auto refresh.
• 64ms refresh period (8K cycle).
• Commercial Temperature Operation (-25°C ~ 70°C).
• 1 /CS Support.
• 2Chips DDP 54Balls FBGA( -YXXX -Pb, -PXXX -Pb Free).
GENERAL DESCRIPTION
The K4S51163PF is 536,870,912 bits synchronous high data
rate Dynamic RAM organized as 4 x 8,388,608 words by 16 bits,
fabricated with SAMSUNG’s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock and I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst lengths and programmable latencies allow the same
device to be useful for a variety of high bandwidth and high per-
formance memory system applications.
ORDERING INFORMATION
Part No.
K4S51163PF-Y(P)F75
Max Freq.
133MHz(CL=3),83MHz(CL=2)
K4S51163PF-Y(P)F90
K4S51163PF-Y(P)F1L
111MHz(CL=3),83MHz(CL=2)
111MHz(CL=3)*1,66MHz(CL=2)
- F : Low Power, Commercial Temperature(-25°C ~ 70°C)
Interface
LVCMOS
Package
54 FBGA Pb
(Pb Free)
Notes :
1. In case of 40MHz Frequency, CL1 can be supported.
2. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake.
Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific
purpose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use.
Address configuration
Organization
32M x16
Bank
BA0,BA1
Row
A0 - A12
Column Address
A0 - A9
1 September 2004

1 page




K4S51163PF-YF pdf
K4S51163PF-Y(P)F
Mobile-SDRAM
DC CHARACTERISTICS
Recommended operating conditions (Voltage referenced to VSS = 0V, TA = -25 to 70°C for Commercial)
Parameter
Symbol
Test Condition
Version
-75 -90 -1L
Unit Note
Operating Current
(One Bank Active)
Burst length = 1
ICC1 tRC tRC(min)
IO = 0 mA
100 90
80 mA 1
Precharge Standby Current in ICC2P CKE VIL(max), tCC = 10ns
power-down mode
ICC2PS CKE & CLK VIL(max), tCC =
Precharge Standby Current
in non power-down mode
ICC2N
CKE VIH(min), CS VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2NS
CKE VIH(min), CLK VIL(max), tCC =
Input signals are stable
0.6
0.6
20
2
mA
mA
Active Standby Current
in power-down mode
Active Standby Current
in non power-down mode
(One Bank Active)
ICC3P CKE VIL(max), tCC = 10ns
ICC3PS CKE & CLK VIL(max), tCC =
ICC3N
CKE VIH(min), CS VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC3NS
CKE VIH(min), CLK VIL(max), tCC =
Input signals are stable
10
2
40
10
mA
mA
mA
Operating Current
(Burst Mode)
ICC4
IO = 0 mA
Page burst
4Banks Activated
tCCD = 2CLKs
150 120 120 mA 1
Refresh Current
ICC5 tARFC tARFC(min)
TCSR Range
Self Refresh Current
ICC6 CKE 0.2V
Full Array
1/2 of Full Array
1/4 of Full Array
NOTES:
1. Measured with outputs open.
2. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ).
170 170 170
Max 40
Max 70
400 900
320 600
280 500
mA
°C
uA
5 September 2004

5 Page





K4S51163PF-YF arduino
K4S51163PF-Y(P)F
Mobile-SDRAM
Partial Array Self Refresh
1. In order to save power consumption, Mobile SDRAM has PASR option.
2. Mobile SDRAM supports 3 kinds of PASR in self refresh mode : Full Array, 1/2 of Full Array, 1/4 of Full Array
BA1=0 BA1=0
BA0=0 BA0=1
BA1=0 BA1=0
BA0=0 BA0=1
BA1=0 BA1=0
BA0=0 BA0=1
BA1=1 BA1=1
BA0=0 BA0=1
BA1=1 BA1=1
BA0=0 BA0=1
BA1=1 BA1=1
BA0=0 BA0=1
- Full Array
- 1/2 Array
- 1/4 Array
Partial Self Refresh Area
Internal Temperature Compensated Self Refresh (TCSR)
Note :
1. In order to save power consumption, Mobile-SDRAM includes the internal temperature sensor and control units to control the
self refresh cycle automatically according to the two temperature range ; Max. 40 °C, Max. 70 °C.
2. If the EMRS for external TCSR is issued by the controller, this EMRS code for TCSR is ignored.
Temperature Range
Max. 40 °C
Max. 70 °C
Full Array
400
900
Self Refresh Current (Icc 6)
1/2 of Full Array
320
600
1/4 of Full Array
280
500
Unit
uA
B. POWER UP SEQUENCE
1. Apply power and attempt to maintain CKE at a high state and all other inputs may be undefined.
- Apply VDD before or at the same time as VDDQ.
2. Maintain stable power, stable clock and NOP input condition for a minimum of 200us.
3. Issue precharge commands for all banks of the devices.
4. Issue 2 or more auto-refresh commands.
5. Issue a mode register set command to initialize the mode register.
6. Issue a extended mode register set command to define DS or PASR operating type of the device after normal MRS.
EMRS cycle is not mandatory and the EMRS command needs to be issued only when DS or PASR is used.
The default state without EMRS command issued is the half driver strength and full array refreshed.
The device is now ready for the operation selected by EMRS.
For operating with DS or PASR , set DS or PASR mode in EMRS setting stage.
In order to adjust another mode in the state of DS or PASR mode, additional EMRS set is required but power up sequence is not
needed again at this time. In that case, all banks have to be in idle state prior to adjusting EMRS set.
11 September 2004

11 Page







PáginasTotal 12 Páginas
PDF Descargar[ Datasheet K4S51163PF-YF.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
K4S51163PF-Y8M x 16Bit x 4 Banks Mobile-SDRAMSamsung semiconductor
Samsung semiconductor
K4S51163PF-YF8M x 16Bit x 4 Banks Mobile-SDRAMSamsung semiconductor
Samsung semiconductor

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar