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PDF S29GL128N Data sheet ( Hoja de datos )

Número de pieza S29GL128N
Descripción MirrorBit Flash Family
Fabricantes ETC 
Logotipo ETC Logotipo



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S29GLxxxN MirrorBitTM Flash Family
S29GL512N, S29GL256N, S29GL128N
512 Megabit, 256 Megabit, and 128 Megabit,
3.0 Volt-only Page Mode Flash Memory featuring
110 nm MirrorBit process technology
Datasheet
Distinctive Characteristics
ADVANCE
INFORMATION
Architectural Advantages
„ Single power supply operation
— 3 volt read, erase, and program operations
„ Enhanced VersatileI/Ocontrol
— All input levels (address, control, and DQ input levels)
and outputs are determined by voltage on VIO input.
VIO range is 1.65 to VCC
„ Manufactured on 110 nm MirrorBit process
technology
„ SecSi(Secured Silicon) Sector region
— 128-word/256-byte sector for permanent, secure
identification through an 8-word/16-byte random
Electronic Serial Number, accessible through a
command sequence
— May be programmed and locked at the factory or by
the customer
„ Flexible sector architecture
— S29GL512N: Five hundred twelve 64 Kword (128
Kbyte) sectors
— S29GL256N: Two hundred fifty-six 64 Kword (128
Kbyte) sectors
— S29GL128N: One hundred twenty-eight 64 Kword
(128 Kbyte) sectors
„ Compatibility with JEDEC standards
— Provides pinout and software compatibility for single-
power supply flash, and superior inadvertent write
protection
„ 100,000 erase cycles per sector typical
„ 20-year data retention typical
Performance Characteristics
„ High performance
— 80 ns access time (S29GL128N, S29GL256N),
90 ns access time (S29GL512N)
— 8-word/16-byte page read buffer
— 25 ns page read times
— 16-word/32-byte write buffer reduces overall
programming time for multiple-word updates
„ Low power consumption (typical values at 3.0 V, 5
MHz)
— 25 mA typical active read current;
— 50 mA typical erase/program current
— 1 µA typical standby mode current
„ Package options
— 56-pin TSOP
— 64-ball Fortified BGA
Software & Hardware Features
„ Software features
— Program Suspend & Resume: read other sectors
before programming operation is completed
— Erase Suspend & Resume: read/program other
sectors before an erase operation is completed
— Data# polling & toggle bits provide status
— Unlock Bypass Program command reduces overall
multiple-word or byte programming time
— CFI (Common Flash Interface) compliant: allows host
system to identify and accommodate multiple flash
devices
„ Hardware features
— Advanced Sector Protection
— WP#/ACC input accelerates programming time
(when high voltage is applied) for greater throughput
during system production. Protects first or last sector
regardless of sector protection settings
— Hardware reset input (RESET#) resets device
— Ready/Busy# output (RY/BY#) detects program or
erase cycle completion
Publication Number 27631 Revision A Amendment 4 Issue Date May 13, 2004
This document contains information on a product under development at FASL LLC. The information is intended to help you evaluate this product. FASL LLC reserves the
right to change or discontinue work on this proposed product without notice.

1 page




S29GL128N pdf
Advance Information
Hardware Reset (RESET#) .............................................................................. 92
Figure 13. Reset Timings..................................................... 92
Erase and Program Operations–S29GL512N Only ...................................93
Erase and Program Operations–S29GL256N Only ................................. 94
Erase and Program Operations–S29GL128N Only ...................................95
Figure 14. Program Operation Timings .................................. 96
Figure 15. Accelerated Program Timing Diagram .................... 96
Figure 16. Chip/Sector Erase Operation Timings ..................... 97
Figure 17. Data# Polling Timings
(During Embedded Algorithms) ............................................ 98
Figure 18. Toggle Bit Timings (During Embedded Algorithms) .. 99
Figure 19. DQ2 vs. DQ6 ...................................................... 99
Alternate CE# Controlled Erase and Program Operations–
S29GL512N Only ...............................................................................................100
Alternate CE# Controlled Erase and Program Operations–
S29GL256N Only ................................................................................................101
Alternate CE# Controlled Erase and Program Operations–
S29GL128N Only ...............................................................................................102
Figure 20. Alternate CE# Controlled Write (Erase/Program)
Operation Timings............................................................ 103
Erase And Programming Performance . . . . . . . 104
TSOP Pin and BGA Package Capacitance . . . . 104
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . .105
TS056—56-Pin Standard Thin Small Outline Package (TSOP) ............105
LAA064—64-Ball Fortified Ball Grid Array (FBGA) ..............................106
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 107
May 13, 2004 27631A4
S29GLxxxN MirrorBitTM Flash Family
5

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S29GL128N arduino
Advance Information
LOGIC SYMBOL
S29GL512N
25
A24–A0
16 or 8
DQ15–DQ0
CE# (A-1)
OE#
WE#
WP#/ACC
RESET#
VIO
BYTE#
RY/BY#
S29GL256N
24
A23–A0
16 or 8
DQ15–DQ0
CE# (A-1)
OE#
WE#
WP#/ACC
RESET#
VIO
BYTE#
RY/BY#
S29GL128N
23
A22–A0
16 or 8
DQ15–DQ0
CE# (A-1)
OE#
WE#
WP#/ACC
RESET#
VIO
BYTE#
RY/BY#
May 13, 2004 27631A4
S29GLxxxN MirrorBitTM Flash Family
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